Acknowledgement
The authors would like to thank the IC Design Center (IDEC) of Korea for supporting chip implementation and EDA tools.
References
- N. Fjjishima, Akio Sugi, Satomi Kajiwara, Kunio Matsubara, Yoshihiko Nagayasu, and C. Andre T. Salama, "A high density, low on-resistance, trench lateral power MOSFET with a trench bottom source contact", Proc. ISPSD, p.143, 2001.
- T. Kubota, Kiminori Watanabe, Kumiko Karouji, Mitsuru Ueno, Yasuko Anai, Yusuke Kawaguchi, and Akio Nakagawa, "Cost-effective approach in LDMOS with partial 0.35 ㎛ design into conventional 0.6 ㎛a process", Proc. ISPSD, p. 245, 2003.
- M. G. Johnson, "A symmetric CMOS NOR gate for high speed application", IEEE JSSC, Vol. Sc-23, No. 5, p. 1233, 1988.
- C. S. Lee, Y. J. Oh, K. Y. Na, Y. S. Kim, and N. S. Kim, "Integrated BiCMOS control circuits for high-performance DC-DC boost converter," IEEE Trans. Power Electronics, vol. 28, no. 5, pp. 2596-2603, May 2013. https://doi.org/10.1109/TPEL.2012.2217156
- H. Kim, S. Ahn, and N. Kim, "CMOS integrated timemode temperature sensor for self-refresh control in DRAM memory cell," IEEE Sensors Journal, vol. 16, no. 17, pp. 6687-6693, 2016. https://doi.org/10.1109/JSEN.2016.2585820
- Sung-Wan Hong, Sang-hui Park, Tae-Hwang Kong, and Gyu-Hyeong Cho, "Inverting buck-boost DC-DC converter for mobile AMOLED display using real-time selftuned minimum power-loss tracking (MPLT) Scheme with Lossless Soft-Switching for Discontinuous Conduction Mode," IEEE J. of Solid-state Circuits, vol. 50, pp. 2380-2393, 2015. https://doi.org/10.1109/JSSC.2015.2450713
- Na K. Y., Ha J. B., Choi M. H., Kim N. S., and Kim Y. S., "Optimizing the gate-to-drift overlap length of lateral double diffused metal-oxide-semiconductor field effect transistor devices to improve hot-carrier device lifetime", Japanese Journal of Applied Physics, Vol. 45, No. 3A, p.1525, 2006. https://doi.org/10.1143/JJAP.45.1525
- J. scholvin, J. G. Fiorenza, and J. A. del Alamo, "The impact of substrate surface potential on the performance of RF power LDMOSFETs on high-resistivity SOI", IEDM, Tech. Dig., p. 363, 2003.
- P. H. Wilson, "A novel trench gate LDMOS for RF applications", Microwave and Telecommunication Technology, 2003.CriMiCo 2003. 13th internation-al Crimean conference, p. 214, 2003.
- Marn-Go Kim, "Error amplifier design of peak current controlled (PCC) buck LED driver," IEEE Trans. Power Electronics, vol. 29, no. 12, pp. 6789-6795, 2014. https://doi.org/10.1109/tpel.2014.2304739
- H. Du, X. Lai, C. Liu, and Y. Chi, "Low quiescent current linear regulator using combination structure of bandgap and error amplifier," Electronics letters, vol. 50, no. 10, pp. 771-773, 2014. https://doi.org/10.1049/el.2013.4277
- S. Ikeda, S. Yeop, H. Ito, N. Ishihara, and K. Masu, "A 0.5 V 5.96-GHz PLL with amplitude-regulated currentreuse VCO," IEEE Microwave and Wireless Components Letters, vol. 27, issue 3, pp. 302-304, 2017. https://doi.org/10.1109/LMWC.2017.2662001
- P. Liu, T. Chen, and S. Hsu, "Area-efficient error amplifier with current-boosting module for fast-transient buck converters," IET Power Electronics, vol. 9, iss. 10, pp. 2147-2153, 2016. https://doi.org/10.1049/iet-pel.2015.0322