IEMEK Journal of Embedded Systems and Applications (대한임베디드공학회논문지)

Institute of Embedded Engineering of Korea (대한임베디드공학회)
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Investigation on TLB Miss Impact through TLB Lockdown in Multi-core Systems

멀티코어 시스템에서 TLB Lockdown에 의한 TLB Miss 영향 분석

  • Received : 2021.09.30
  • Accepted : 2022.02.08
  • Published : 2022.02.28
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Abstract

Virtual memory is used as the method to ensure the safety of the system through memory protection in the real-time system. TLB miss caused by using virtual memory makes the real-time system WCET more pessimistically. TLB lockdown can be applied as a method to improve this problem. However, processors with limited TLB lockdown entries, a selection criterion is needed to efficiently utilize the TLB lockdown entry. In this paper, the most frequently accessed virtual pages in the process are applied to the TLB lockdown by analyzing memory profiling. The results showed that micro data TLB miss stall cycle and main data TLB miss stall cycle of the processor decreased by at least 4.7% and up to 29.7%.

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References

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