Nuclear Engineering and Technology

  • 제53권10호
  • /
  • Pages.3327-3334
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  • 2021
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  • 1738-5733(pISSN)
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  • 2234-358X(eISSN)
한국원자력학회 (Korean Nuclear Society)
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Smart grid and nuclear power plant security by integrating cryptographic hardware chip

  • Kumar, Niraj (Department of Electronics & Communication Engineering, Uttarakhand Technical University) ;
  • Mishra, Vishnu Mohan (Bipin Tripathi Kumaon Institute of Technology Dwarahat) ;
  • Kumar, Adesh (Department of Electrical & Electronics Engineering, School of Engineering, University of Petroleum and Energy Studies)
  • 투고 : 2021.02.16
  • 심사 : 2021.05.05
  • 발행 : 2021.10.25
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초록

Present electric grids are advanced to integrate smart grids, distributed resources, high-speed sensing and control, and other advanced metering technologies. Cybersecurity is one of the challenges of the smart grid and nuclear plant digital system. It affects the advanced metering infrastructure (AMI), for grid data communication and controls the information in real-time. The research article is emphasized solving the nuclear and smart grid hardware security issues with the integration of field programmable gate array (FPGA), and implementing the latest Time Authenticated Cryptographic Identity Transmission (TACIT) cryptographic algorithm in the chip. The cryptographic-based encryption and decryption approach can be used for a smart grid distribution system embedding with FPGA hardware. The chip design is carried in Xilinx ISE 14.7 and synthesized on Virtex-5 FPGA hardware. The state of the art of work is that the algorithm is implemented on FPGA hardware that provides the scalable design with different key sizes, and its integration enhances the grid hardware security and switching. It has been reported by similar state-of-the-art approaches, that the algorithm was limited in software, not implemented in a hardware chip. The main finding of the research work is that the design predicts the utilization of hardware parameters such as slices, LUTs, flip-flops, memory, input/output blocks, and timing information for Virtex-5 FPGA synthesis before the chip fabrication. The information is extracted for 8-bit to 128-bit key and grid data with initial parameters. TACIT security chip supports 400 MHz frequency for 128-bit key. The research work is an effort to provide the solution for the industries working towards embedded hardware security for the smart grid, power plants, and nuclear applications.

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