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The Verification of Channel Potential using SPICE in 3D NAND Flash Memory

SPICE를 사용한 3D NAND Flash Memory의 Channel Potential 검증

  • Kim, Hyunju (Dept. of Electronics Engineering, Korea National University of Transportation) ;
  • Kang, Myounggon (Dept. of Electronics Engineering, Korea National University of Transportation)
  • Received : 2021.11.24
  • Accepted : 2021.12.29
  • Published : 2021.12.31

Abstract

In this paper, we propose the 16-layer 3D NAND Flash memory compact modeling using SPICE. In the same structure and simulation conditions, the channel potential about Down Coupling Phenomenon(DCP) and Natural Local Self Boosting (NLSB) were simulated and analyzed with Technology Computer Aided Design(TCAD) tool Atlas(SilvacoTM) and SPICE, respectively. As a result, it was confirmed that the channel potential of TCAD and SPICE for the two phenomena were almost same. The SPICE can be checked the device structure intuitively by using netlist. Also, its simulation time is shorter than TCAD. Therefore, using SPICE can be expected to efficient research on 3D NAND Flash memory.

본 논문에서는 SPICE를 사용한 16단 3D NAND Flash memory compact modeling을 제안한다. 동일한 structure와 simulation 조건에서 Down Coupling Phenomenon(DCP)과 Natural Local Self Boosting(NLSB)에 대한 channel potential을 Technology Computer Aided Design(TCAD) tool Atlas(SilvacoTM)와 SPICE로 simulation하고 분석했다. 그 결과 두 현상에 대한 TCAD와 SPICE의 channel potential이 매우 유사한 것을 확인할 수 있었다. SPICE는 netlist를 통해 소자 structure를 직관적으로 확인할 수 있다. 또한, simulation 시간이 TCAD에 비해 짧게 소요된다. 그러므로 SPICE를 이용하여 3D NAND Flash memory의 효율적인 연구를 기대할 수 있다.

Keywords

Acknowledgement

This work was supported in part by the Institute of Information and Communications Technology Planning and Evaluation (IITP) funded by the Korea government (MSIT) under Grant 2021-0-01764 and in part by the MOTIE(Ministry of Trade, Industry & Energy (10085645) and KSRC(Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device and in part by Korea Institute for Advancement of Technology (KIAT) grant funded by the Korea Government (MOTIE) (N000P0008500, The Competency Development Program for Industry Specialist).

References

  1. Y. Kim, J. G. Yun, S. H. Park, W. Kim, J. Y. Seo, M. Kang, K. C. Ryoo, J. H. Oh, J. H. Lee, H. Shin, and B. G. Park, "Three-dimensional NAND Flash architecture design based on single-crystalline stacked array," IEEE Trans. Electron Devices, vol.59, no.1, pp.35-45, 2012. DOI: 10.1109/TED.2011.2170841
  2. Y. Kim, M. Kang, S. H. Park, and B. G. Park, "Three-dimensional NAND Flash memory based on single-crystalline channel stacked array," IEEE Electron Device Letters, vol.34, no.8, pp.990-992, 2013. DOI: 10.1109/LED.2013.2262174
  3. M. K. Jeong, S. M. Joe, B. S. Jo, H. J. Kang, J. H. Bae, K. R. Han, E. Choi, G. Cho, S. K. Park, B. G. Park, and J. H. Lee, "Characterization of traps in 3-D stacked NAND Flash memory devices with tube-type poly-Si channel structure," IEEE International Electron Devices Meeting, pp.9.3.1-9.3.4, 2012. DOI: 10.1109/IEDM.2012.6479010
  4. M. Kang, I. H. Park, I. J. Chang, K. Lee, S. Seo, B. G. Park, and H. Shin, "An accurate compact model considering direct-channel interference of adjacent cells in sub-30-nm NAND Flash technologies," IEEE Electron Device Letters, vol.33, no.8, pp. 1114-1116, 2012. DOI: 10.1109/LED.2012.2201442
  5. M. Park, K. Kim, J. H. Park, and J. H. Choi, "Direct field effect of neighboring cell transistor on cell-to-cell interference of NAND Flash cell arrays," IEEE Electron Device Letters, vol.30, no.2, pp.174-177, 2008. DOI: 10.1109/LED.2008.2009555
  6. Y. Kim and M. Kang, "Down-coupling phenomenon of floating channel in 3D NAND Flash memory" IEEE Electron Device Letters, vol.37, no.12, pp. 1566-1569, 2016. DOI: 10.1109/LED.2016.2619903
  7. M. Kang and Y. Kim, "Natural local self-boosting effect in 3D NAND Flash memory," IEEE Electron Device Letters, vol.38, pp.1236-1239, 2017. DOI: 10.1109/LED.2017.2736541
  8. Silvaco, Inc., "Atlas User's Manual, Silvaco V ersion. 5.19.20.", http://www.silvaco.com/products/tcad/device_simulation/atlas/atlas.html