반도체디스플레이기술학회지 (Journal of the Semiconductor & Display Technology)

한국반도체디스플레이기술학회 (The Korean Society Of Semiconductor & Display Technology)
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실리콘 웨이퍼 습식 식각장치 설계 및 공정개발

Design of Single-wafer Wet Etching Bath for Silicon Wafer Etching

  • Kim, Jae Hwan (Department of Electronics Engineering, Myongjj University) ;
  • Lee, Yongil (Department of Electronics Engineering, Myongjj University) ;
  • Hong, Sang Jeen (Department of Electronics Engineering, Myongjj University)
  • 투고 : 2020.06.15
  • 심사 : 2020.06.23
  • 발행 : 2020.06.30
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초록

Silicon wafer etching in micro electro mechanical systems (MEMS) fabrication is challenging to form 3-D structures. Well known Si-wet etch of silicon employs potassium hydroxide (KOH), tetramethylammonium hydroxide (TMAH) and sodium hydroxide (NaOH). However, the existing silicon wet etching process has a fatal disadvantage that etching of the back side of the wafer is hard to avoid. In this study, a wet etching bath for 150 mm wafers was designed to prevent back-side etching of silicon wafer, and we demonstrated the optimized process recipe to have anisotropic wet etching of silicon wafer without any damage on the backside. We also presented the design of wet bath for 300 mm wafer processing as a promising process development.

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참고문헌

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