Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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Far-End Crosstalk Compensation for High-Speed Interface

고속 인터페이스를 위한 원단누화 보상 기술 동향

  • Lee, Won-Byoung (Department of Semiconductor and Display Engineering, Sungkyunkwan University) ;
  • Kong, Bai-Sun (Department of Semiconductor and Display Engineering, Sungkyunkwan University)
  • Received : 2019.09.05
  • Accepted : 2019.09.27
  • Published : 2019.09.30
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Abstract

In a multi-channel single-ended system, the far-end crosstalk (FEXT) due to mutual inductance and mutual capacitance between two adjacent channels critically limit the bandwidth. FEXT causes crosstalk-induced jitter (CIJ) and crosstalk-induced glitch (CIG) which leads to timing margin and voltage margin degradations, respectively. Therefore, FEXT must be compensated in order to increase eye opening and achieve high data-rate. It can be compensated in transmitter by controlling the timing of the data or reshaping the waveform of the signal. Also, FEXT can be compensated in receiver by generating mimicked FEXT using high-pass filter. In this paper, recent techniques to compensate FEXT are investigated, with discussions of their pros and cons.

멀티채널 단일 종단(single-ended) 환경에서 채널 사이의 상호인덕턴스 및 상호캐패시턴스에 의한 원단누화 현상(FEXT)은 결정적으로 채널의 대역폭 감소를 일으킨다. 원단누화에 의해 누화-유발 지터(CIJ)와 누화-유발 글리치(CIG)가 생기며 이들은 각각 타이밍 마진 감소와 전압 마진 감소를 일으킨다. 따라서 아이 오프닝 증가와 높은 데이터 전송속도를 얻기 위해서는 원단누화 현상을 보상해야 한다. 원단누화 보상은 송신단에서 타이밍 조절 또는 파형 변형을 통해 보상할 수 있다. 또한, 수신단에서 고역-필터를 사용하여 유사 원단누화 잡음을 만들어 보상하는 방법도 있다. 본 논문에서는 원단누화 보상의 최근 기술 동향을 소개하며, 이들의 장점과 단점을 논의한다.

Keywords

References

  1. S. Lee et al., "A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation," in IEEE JSSC, vol.48, no.9, pp. 2118-2127, 2013. DOI: 10.1109/JSSC.2013.2264618
  2. H. Jung et al., "A 4 Gb/s 3-bit Parallel Transmitter With the Crosstalk-Induced Jitter Compensation Using TX Data Timing Control," in IEEE JSSC, vol.44, no.11, pp.2891-2900, 2009. DOI: 10.1109/JSSC.2009.2028917
  3. K. Sham et al., "I/O Staggering for Low-Power Jitter Reduction," 2008 38th EMC, Amsterdam, pp.1226-1229. 2008. DOI: 10.1109/EUMC.2008.4751682
  4. Ahn, Jeong-Keun et al., (2018). Pair-wise staggering transmitter for single-ended parallel signaling. IEICE ELEX. 15. DOI: 10.1587/elex.15.20171238.
  5. H. Jung et al., "A slew-rate controlled transmitter to compensate for the crosstalk- induced jitter of coupled microstrip lines," IEEE CICC 2010, San Jose, CA, pp.1-4, 2010. DOI: 10.1109/CICC.2010.5617597
  6. H. Jung et al., "A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines," in IEEE JSSC, vol.47, no.9, pp.2068-2079, 2012. DOI: 10.1109/JSSC.2012.2197233
  7. S. Kao et al., "A 7.5-Gb/s One-Tap-FFE Transmitter With Adaptive Far-End Crosstalk Cancellation Using Duty Cycle Detection," in IEEE JSSC, vol.48, no.2, pp.391-404, 2013. DOI: 10.1109/JSSC.2012.2227604
  8. S. Yuan et al., "A $4{\times}20$-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS," 2015 IEEE CICC, pp.1-4, 2015. DOI: 10.1109/CICC.2015.7338414
  9. C. Aprile et al., "An Eight-Lane 7-Gb/s/pin Source Synchronous Single-Ended RX With Equalization and Far-End Crosstalk Cancellation for Backplane Channels," in IEEE JSSC, vol.53, no.3, pp.861-872, 2018. DOI: 10.1109/JSSC.2017.2783679
  10. T. Oh et al., "A 6-Gb/s MIMO Crosstalk Cancellation Scheme for High-Speed I/Os," in IEEE JSSC, vol.46, no.8, pp.1843-1856, 2011. DOI: 10.1109/JSSC.2011.2151410
  11. S. Kao et al., "A 10-Gb/s Adaptive Parallel Receiver With Joint XTC and DFE Using Power Detection," in IEEE JSSC, vol.48, no.11, pp.2815-2826, 2013. DOI: 10.1109/JSSC.2013.2282116