The Transactions of the Korean Institute of Power Electronics (전력전자학회논문지)

The Korean Institute of Power Electronics (전력전자학회)
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PLL Control Strategy for ZVRT(Zero Voltage Ride Through) of a Grid-connected Single-phase Inverter

계통연계형 단상 인버터의 ZVRT(Zero Voltage Ride Through)를 위한 PLL 제어 전략

  • Lee, Tae-Il (Dept. of Energy and Electrical Eng, Korea Polytechnic University) ;
  • Lee, Kyung-Soo (Dept. of Energy and Electrical Eng, Korea Polytechnic University)
  • Received : 2018.10.04
  • Accepted : 2018.12.24
  • Published : 2019.06.20
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Abstract

Grid codes for grid-connected inverters are essential considerations for bulk grid systems. In particular, a low-voltage ride-through (LVRT) function, which can contribute to the grid system's stabilization with the occurrence of voltage sag, is required by such inverters. However, when the grid voltage is under zero-voltage condition due to a grid accident, a zero-voltage ride-through (ZVRT) function is required. Grid-connected inverters typically have phase-locked loop (PLL) control to synchronize the phase of the grid voltage with that of the inverter output. In this study, the LVRT regulations of Germany, the United States, and Japan are analyzed. Then, three major PLL methods of grid-connected single-phase inverters, namely, notch filter-PLL, dq-PLL using an active power filter, and second-order generalized integrator-PLL, are reviewed. The proposed PLL method, which controls inverter output under ZVRT condition, is suggested. The proposed PLL operates better than the three major PLL methods under ZVRT condition in the simulation and experimental tests.

Keywords

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Fig. 1. LVRT and ZVRT regulation in Germany, USA and Japan[7].

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Fig. 3. Reactive power curve depending on the grid voltage variations[11].

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Fig. 11. Bode plot of D(s) of the SOGI-QSG with different control gain.

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Fig. 15. Simulation results for zero voltage condition.

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Fig. 16. Simulation results for conventional PLL control in zero voltage condition.

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Fig. 17. Simulation results for proposed PLL control in zero voltage condition.

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Fig. 19. Simulation results for reactive current injection (proposed PLL based on SOGI).

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Fig. 2. LVRT regulation in Germany[11].

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Fig. 4. LVRT regulation in the USA[4].

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Fig. 5. LVRT regulation in Japan[7].

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Fig. 6. Control block of the grid-connected inverter.

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Fig. 7. Basic Structure of PLL concept[1].

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Fig. 8. Notch filter + PLL Block diagram.

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Fig. 9. dq-PLL Block diagram using APF method.

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Fig. 10. SOGI-PLL Block diagram.

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Fig. 12. Bode plot of Q(s) of the SOGI-QSG with different control gain.

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Fig. 13. Proposed PLL block diagram based on SOGI-PLL.

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Fig. 14. Proposed PLL algorism based on SOGI-PLL.

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Fig. 18. PSIM Simulation schematic for three PLL controls.

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Fig. 20. Simulation results for LVRT regulation in Germany.

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Fig. 21. Simulation results for LVRT regulation in USA.

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Fig. 22. Simulation results for LVRT regulation in Japan.

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Fig. 23. Photograph of experimental equipment.

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Fig. 24. Grid voltage, Inverter output current in Germany ZVRT test(Notch filter+PLL).

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Fig. 25. Grid voltage, Inverter output current in Germany ZVRT test(dq-PLL using APF).

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Fig. 26. Grid voltage, Inverter output current in Germany ZVRT test(SOGI-PLL).

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Fig. 27. Grid voltage, Inverter output current in the USA ZVRT test(Notch filter + PLL).

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Fig. 28. Grid voltage, Inverter output current in the USA ZVRT test(dq-PLL using APF).

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Fig. 29. Grid voltage, Inverter Output current in the USA ZVRT test(SOGI-PLL).

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Fig. 30. Grid voltage, Inverter output current in Japan ZVRT test(notch filter + PLL).

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Fig. 31. Grid voltage, Inverter output current in Japan ZVRT test(dq-PLL using APF).

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Fig. 32. Grid voltage, Inverter output current in Japan ZVRT test(SOGI-PLL).

TABLE I SIMULATION PARAMETERS

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TABLE III SETTLING TIME COMPARISON OF EXPERIMENTAL RESULTS

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TABLE II EXPERIMENT PARAMETERS

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