전기전자학회논문지 (Journal of IKEEE)

  • 제23권1호
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  • Pages.207-213
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  • 2019
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  • 1226-7244(pISSN)
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  • 2288-243X(eISSN)
한국전기전자학회 (Institute of Korean Electrical and Electronics Engineers)
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객체 추적을 위한 특징점 검출기의 설계 및 구현

Design and Implementation of Feature Detector for Object Tracking

  • Lee, Du-hyeon (School of Electronics and Information Engineering, Korea Aerospace University) ;
  • Kim, Hyeon (School of Electronics and Information Engineering, Korea Aerospace University) ;
  • Cho, Jae-chan (School of Electronics and Information Engineering, Korea Aerospace University) ;
  • Jung, Yun-ho (School of Electronics and Information Engineering, Korea Aerospace University)
  • 투고 : 2019.03.10
  • 심사 : 2019.03.20
  • 발행 : 2019.03.31
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초록

본 논문에서는 객체 추적을 위한 간소화된 특징점 검출 알고리즘을 제안하고, 이의 실시간 처리를 위한 하드웨어 구조 설계 및 구현 결과를 제시한다. 기존 Shi-Tomasi 알고리즘은 객체 추적 응용에서 우수한 성능을 보이지만, 연산 복잡도가 큰 문제가 존재한다. 따라서, 기존 알고리즘에 비해 연산 복잡도를 간소화시키면서 유사한 성능 지원이 가능한 효율적인 특징점 검출 알고리즘을 제안하고, 하드웨어 설계 및 구현 결과를 제시한다. 제안된 특징점 검출기는 FPGA 기반 구현 결과, 1,307개의 logic slices, 5개의 DSP 48s, 86.91Kbit의 메모리로 구현 가능함을 확인하였으며, 114MHz의 동작 주파수로 $1920{\times}1080FHD$급 영상에 대해 54fps의 실시간 처리가 가능하다.

In this paper, we propose a low-complexity feature detection algorithm for object tracking and present hardware architecture design and implementation results for real-time processing. The existing Shi-Tomasi algorithm shows good performance in object tracking applications, but has a high computational complexity. Therefore, we propose an efficient feature detection algorithm, which can reduce the operational complexity with the similar performance to Shi-Tomasi algorithm, and present its real-time implementation results. The proposed feature detector was implemented with 1,307 logic slices, 5 DSP 48s and 86.91Kbits memory with FPGA. In addition, it can support the real-time processing of 54fps at an operating frequency of 114MHz for $1920{\times}1080FHD$ images.

키워드

JGGJB@_2019_v23n1_207_f0001.png 이미지

Fig. 1. Example of feature candidate selection according to eigenvalue calculation. 그림 1. 고윳값 계산에 따른 특징점 후보 선정 예시

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Fig. 3. Example of feature tracking results. 그림 3. 특징점 추적 결과 예시

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Fig. 2. Feature detection examples: (a) Harris, (b) Shi-Tomasi, (c) Proposed algorithm. 그림 2. 특징점 검출 결과 예시 (a) Harris, (b) Shi-Tomasi, (c) 제안된 알고리즘

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Fig. 4. Block diagram for the proposed feature detector. 그림 4. 제안된 특징점 검출기의 블록도

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Fig. 5. Block diagram for the Gaussian filter. 그림 5. 가우시안 필터의 블록도

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Fig. 6. Example of line buffer data flow. 그림 6. 라인 버퍼의 데이터 플로우 예시

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Fig. 7. Block diagram for the region checking unit. 그림 7. 영역 체크 유닛의 블록도

Table 1. Implementation results of the proposed feature detector with Virtex-7 FPGA. 표 1. Virtex-7 FPGA 기반 특징점 검출기의 구현 결과

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Table 2. Processing-rate comparisons. 표 2. 처리 속도 비교

JGGJB@_2019_v23n1_207_t0002.png 이미지

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