Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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A Study on ESD Protection Circuit for 2-Stack Structure Design Based on LVTSCR

LVTSCR 기반의 2-Stack 구조 설계를 위한 ESD 보호회로에 관한 연구

  • Seo, Jeong-Yun (Dept. of Electronics Engineering, DanKook Unversity) ;
  • Do, Kyoung-Il (Dept. of Electronics Engineering, DanKook Unversity) ;
  • Chae, Hee-Guk (Dept. of Electronics Engineering, DanKook Unversity) ;
  • Seo, Jeong-Ju (Dept. of Electronics Engineering, DanKook Unversity) ;
  • Koo, Yong-Seo (Dept. of Electronics Engineering, DanKook Unversity)
  • Received : 2018.09.11
  • Accepted : 2018.09.18
  • Published : 2018.09.30
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Abstract

In this paper, This paper is based on the conventional ESD protection circuits SCR and LVTSCR. Also, the SCR-based ESD protection circuit, which is different from the conventional structure, is presented and tested for variations in the trigger voltage and holding voltage. Due to the insertion of additional N +, P + regions, the newly added SCR-based protection circuit have improved electrical characteristics. To discuss the electrical characteristics of the proposed circuit, Synopsys T-CAD simulation data was shown.

본 논문에서는 대표적인 ESD 보호회로인 SCR, LVTSCR을 기반으로 하여 특정한 어플리케이션의 요구 전압에 맞추어 설계하기 위한 Stack 기술에 대하여 서술한다. 또한 기존 구조와는 다른 SCR 기반의 ESD 보호회로를 제시하여 Stack기술에 적용함으로써, 주요 파라미터인 트리거 전압과 홀딩 전압의 변동에 대하여 검증한다. 새로이 추가되는 SCR 기반의 보호 회로의 경우 추가적인 N+, P+ 영역의 삽입으로 인해 보다 높은 홀딩 전압을 갖는 ESD 보호회로이다. 또한 시놉시스사의 T-CAD 시뮬레이터를 이용하여 제안된 ESD 보호회로의 전기적 특성을 검증을 실시하였다.

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References

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