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구조분할 해석기법 기반 전원보드 공통모드 노이즈 감쇠 설계

Common-Mode Noise Suppression in Switched-Mode Power Supply Boards Using Segmentation Method

  • 투고 : 2018.01.02
  • 심사 : 2018.02.02
  • 발행 : 2018.02.28

초록

본 논문에서는 전원보드의 공통모드 노이즈 감쇠를 위한 디커플링 커패시터 회로를 효율적으로 시뮬레이션할 수 있는 구조분할 해석기법을 제시한다. 제시하는 구조분할 해석기법이 적용된 전원보드 설계에서는 보드를 두 부분으로 구조분할하였으며, 분할된 구조와 커패시터 회로의 임피던스 파라미터를 재결합하기 위한 방법을 제시하였다. 구조분할 해석기법을 적용함으로써 공통모드 노이즈 감쇠 시뮬레이션에 수행되는 시간을 46 % 이상 단축하였다.

In this paper, we present a design technique for the suppression of common-mode(CM) noise in switched-mode power supply boards using the segmentation method. By applying the segmentation method, the example structure is decomposed into two segments with decoupling capacitors and a recombination matrix is extracted for the segments. The effects of the decoupling capacitor on CM noise suppression are examined. The simulation time is significantly reduced on using the segmentation method.

키워드

참고문헌

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