Fig. 1. Operation areas based on phase angle of outputvoltage and inductor current in A-phase
Fig. 2. 3-phase 2-level VSC circuit
Fig. 3. 3LT VSC circuit
Fig. 4. Block diagram of proposed method sequence
Fig. 5. Simulation waveform (fs = 10 kHz, Rload = 48 Ω) :(a) output phase voltage Van, Vbn, and Vcn, (b)inductor current iaL, ibL, and icL, (c) 2-level A-phaseloss calculation Pa2 and 3-level A-phase losscalculation Pa3, (d) Pa3 - Pa2
Fig. 6. Simulation efficiency with R load (3 kW, 6 kW)
Fig. 7. 2-level operation mode waveform: Ch1 outputvoltage, Van (250 V/div), Ch2 inverter voltage, Vainv(250 V/div), Ch3 inductor current, iaL (10 A/div)
Fig. 8. 3-level operation mode waveform: Ch1 outputvoltage, Van (250 V/div), Ch2 inverter voltage, Vainv(250 V/div), Ch3 inductor current, iaL (10 A/div)
Fig. 9. Proposed method waveform: Ch1 output voltage,Van (250 V/div), Ch2 inverter voltage, Vainv (250V/div), Ch3 inductor current, iaL (10 A/div), Ch4Pa3 ? Pa2 value (5 W/div)
Fig. 10. Proposed method waveform with RL load: Ch1output voltage, Van (250 V/div), Ch2 invertervoltage, Vainv (250 V/div), Ch3 load current, iLoad(10 A/div)
Fig. 11. Experiment efficiency with R load (3 kW, 6 kW)
Fig. 12. Experiment efficiency with R load (1 kW, 2 kW)
Fig. 13. Experiment efficiency with RL load (1 kW, 2 kW)
Table 1. 2-level VSC switching and conduction losses
Table 2. 3LT VSC switching and conduction losses
Table 3. System parameter
참고문헌
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