Fig. 1. Block diagram of the proposed dual-mode frequency tripler.
Fig. 2. Structure of stacked FET PA.
Fig. 3. Circuit of three-push tripler.
Fig. 4. Result of frequency multiplier mode.
Fig. 5. Circuit of dual mode tripler using stacked FETs.
Fig. 6. Result of tripler mode.
Fig. 7. Result of amplifier mode.
References
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