JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Divided Disk Cache and SSD FTL for Improving Performance in Storage

  • Park, Jung Kyu (school of Electrical and Computer Engineering, UNIST) ;
  • Lee, Jun-yong (school of Electrical and Computer Engineering, UNIST) ;
  • Noh, Sam H. (school of Electrical and Computer Engineering, UNIST)
  • Received : 2016.10.16
  • Accepted : 2017.02.03
  • Published : 2017.02.28
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Abstract

Although there are many efficient techniques to minimize the speed gap between processor and the memory, it remains a bottleneck for various commercial implementations. Since secondary memory technologies are much slower than main memory, it is challenging to match memory speed to the processor. Usually, hard disk drives include semiconductor caches to improve their performance. A hit in the disk cache eliminates the mechanical seek time and rotational latency. To further improve performance a divided disk cache, subdivided between metadata and data, has been proposed previously. We propose a new algorithm to apply the SSD that is flash memory-based solid state drive by applying FTL. First, this paper evaluates the performance of such a disk cache via simulations using DiskSim. Then, we perform an experiment to evaluate the performance of the proposed algorithm.

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