I. INTRODUCTION
Generally, AC-module systems are more difficult to maintain than other photovoltaic (PV) generation systems, because they need to be installed in all of the PV-panels. Therefore, AC-modules require high reliability in general. Because the lifespan of a PV-panel is 20-25 years, an AC-module must guarantee a lifespan of over 20 years. The reliability R(t) can be calculated from (1), where t represents the lifespan or operating time and the mean time between failure (MTBF) indicates the average time until failure and the reciprocal of the failure rate.
Fig. 1 shows the relationship between the MTBF and the reliability of the PV-PCS lifespan. As shown in Fig. 1, the MTBF of the power conversion system must be over 390 in order to assure 95% reliability with a 20 year lifespan [1], [2].
Fig. 1.The relationship between the MTBF and reliability of the PV-PCS lifespan.
When the PV-PCS is connected to the grid, a pulsating output power occurs in the PV-panel because the AC-module converts the DC power to AC power. This means that it is difficult for the AC-module to control the maximum power point tracking (MPPT). Generally, the conventional AC-module has a large electrolytic capacitor bank for passive power decoupling. However, this large electrolytic capacitor bank reduces the system lifespan because its MTBF is generally lower than 100. Thus, active power decoupling techniques have been researched in order to replace the electrolytic capacitor with a film capacitor [3]-[10].
In addition, a micro-grid using renewable energy, which includes PV, wind power, and fuel cells, has attracted a lot of attention for next-generation power grid systems. The output power of renewable energy can vary according to ambient conditions such as irradiation and temperature. Variations in the output power of renewable energy sources can degrade the power quality of the micro-grid. In particular, using PV is more difficult since it cannot generate power at night. Therefore, an energy storage system (ESS) is used to enhance grid stability [11]-[14].
In this paper, an AC-module with active power decoupling and an ESS is proposed. The proposed converter mainly consists of an AC-module based on a flyback inverter and a bi-directional converter with a battery. The bi-directional converter operates to reduce the power pulsation on the PV output power. Thus, the MTBF can be increased by replacing the electrolytic capacitor with a film capacitor. This then ensures high reliability of the lifespan and reduces the cost of maintenance. In addition, the proposed AC module system can be used for obtaining financial benefits and load leveling by using the ESS function. Furthermore, the proposed system can easily extend its capacity compared with conventional BES systems.
The basic operating principles and each mode of the proposed converter are introduced in Section II. The proposed converter has five operating modes according to the generated power of the PV-panel and the state of charge (SOC) of the battery. The control methods of each mode are discussed in Section III, and the design methods of the proposed converter are illustrated in Section IV. Finally, experimental results using a 125W laboratory prototype are described in Section V, and some conclusions are presented in Section VI.
II. AC-MODULE WITH APDES
A. Configuration of the Proposed AC-module
Fig. 2 shows the configuration of the proposed topology. The proposed AC-module is composed of a flyback converter, an unfolding bridge, and a bi-directional converter. It is referred to as an active power decoupling circuit with energy storage (APDES), since it operates active power decoupling and stores energy. The APDES is connected to a decoupling capacitor Cin in parallel, and is composed of four switches Qbk1, Qbk2, Qbst1, and Qbst2, a buffer capacitor Cb, a battery, and two inductors, Ldec and Lbatt. The flyback converter generates a rectified sinusoidal waveform of primary current in the discontinuous conduction mode (DCM), and controls the output power [5]. The peak current flowing through the primary side of the flyback converter is determined by the MPPT which operates the synchronization of the grid phase using a phase lock loop (PLL). Finally, the generated power flows to the grid through the CL filter.
Fig. 2.Configuration of the proposed AC-module.
The APDES compensates the differences in the output powers between the PV-panel and the AC-module for reducing the decoupling capacitance. The Qbk1 and Qbst1 switches implement current control for decoupling. The auxiliary circuit transfers power ripples from Cin to Cb. As a result, the capacitance of Cin is designed to be low since the power ripple on Cin is decreased.
In addition, the APDES performs output power control by charging and discharging energy to the battery. The output reference of the APDES is determined by the power difference between the output power of the AC-module and the generation power of the PV-panel. The Qbk2 and Qbst2 switches implement battery charging and discharging control.
B. Operation Modes
The operation modes of the proposed system are divided by the output power reference according to the generated power of the PV-panel, the load demand, and the SOC of the battery. Fig. 3 shows the operation modes of the proposed AC-module, which are determined from the operating algorithm as shown in Fig. 4.
Fig. 3.Operation mode of the proposed AC-module.
Fig. 4.Operating algorithm of the proposed AC-module.
Mode 1: When the power demand of the load is low and the generated power of the PV-panel is large, the AC-module supplies output power to the grid, and the APDES supplies the surplus power to the battery.
Mode 2: If the generated power of the PV-panel is lower than the demand of the load, the power shortage is compensated through battery discharging. In the cases of Mode 1 and Mode 2, the APDES performs active decoupling while simultaneously charging or discharging energy through the battery.
Mode 3: When the battery is fully charged or completely discharged, the AC-module operates in Mode 3. In this mode, the APDES only performs the decoupling function.
Mode 4: When a grid fault occurs, or the battery SOC is low, the total output power of the PV-panel should be stored as shown in Fig. 3(d). Because the flyback converter does not operate in this mode, the Qbk1 and Qbst1 switches in the APDES perform MPPT control instead of active power decoupling. In addition, the Qbk2 and Qbst2 switches perform constant voltage (CV) or constant current (CC) control to charge the battery.
Mode 5: If the PV-panel does not generate power under low irradiation conditions, the flyback converter controls the input voltage without MPPT control. The APDES discharges energy from the battery.
III. CONTROL OF THE PROPOSED AC-MODULE
A. Flyback Converter
The peak duty of Qm, (i.e., dp) is provided by the MPPT controller. Therefore, the duty of the primary side switch Qm (i.e., D(t)) is given by (2), where ω is the angular frequency of the grid voltage. The peak current flowing through the magnetizing inductance Lm, (i.e., ipri,pk) in one switching period can be described by (3), where ton indicates the turn-on time of the primary side switch Qm [15]. ipri,pk is directly proportional to the output voltage of the PV-panel VPV and ton, and it is inversely proportional to Lm. This means that ipri,pk is determined from D(t) when the switching frequency is constant.
The average current of the flyback converter ipri,avg in one switching period is given by (4).
where Tsw is the switching period of Qm.
If efficiency is neglected, the average power delivered to the secondary side from the primary side is the same as the average output power of the PV-panel PPV. In this case, the instantaneous power of the primary stage Ppri(t) is given by (5).
The average output power of the AC-module Po can be controlled by varying the peak duty or the switching frequency. Thus, the reference of the output power can be described as (6).
where dp,ctrl is the peak duty to control the output power. Using (5) and (6), dp,ctrl can be rearranged as (7) with k, which refers to the proportion of to PPV.
In this paper, the output power of the AC-module is controlled based on (7). Fig. 5 shows the composition of the control block, which generates the duty of Qm. After the MPPT controller determines dp, it is adjusted by the output power reference through (7).
Fig. 5.Proposed control blocks of the flyback converter.
B. Active Power Decoupling
Fig. 6 shows Po, PPV, and the input power of the APDES Pdec. As shown in Fig. 6, Pdec is the power difference between Po and PPV. If PPV is greater than Po as in case ‘A’, the surplus power charges the battery using the APDES. On the other hand, if PPV is less than Po as in case ‘B’, the lack of power is compensated by the APDES. The input power of the APDES is described as (8). Using (8), the input current reference of the APDES can be obtained as (9).
Fig. 6.Instantaneous power of PV-panel, APDES, and AC module.
The voltage of Cb pulsates at twice the grid frequency. The voltage ripple on Cb makes it difficult to control the APDES. The variance of idec in one switching period (i.e., Δidec) is represented by (10). Thus, the duty of the switch Dbst1 for compensating the fluctuation of the output voltage is shown as (11).
The decoupling current controller using (9) and (11) is configured as shown in Fig. 7.
Fig. 7.Block diagram of the decoupling current controller.
C. Control of the ESS
The proposed AC-module controls the output power while the APDES performs the decoupling function. The amount of energy for charging or discharging is determined by the difference between and PPV. Because the voltage of the buffer capacitor has ripples due to idec, the voltage ripples make it difficult to control the APDES. Therefore, a notch filter is used for eliminating the ripple at Cb. Fig. 8 shows a block diagram of battery charging or discharging. If is larger than PPV, the APDES controls the discharge of the battery using the constant current (CC) control. If is less than PPV, the APDES controls the charge of the battery using the constant current constant voltage (CC-CV) control. When the battery has a high SOC, the constant voltage (CV) control is performed in the CC-CV mode. In this case, should be newly calculated as in (12).
Fig. 8.Controller block diagram of APDES for ESS.
When a grid fault occurs or the battery has a low SOC, all of PPV should be stored in the battery under Mode 4. In this case, the flyback converter does not operate the MPPT control. Instead, Qbk1 and Qbst1 in the APDES perform the MPPT control. In addition, Qbk2 and Qbst2 control the constant voltage of the buffer capacitor, and the duty ratio is determined from the battery charge current control. A control block of Mode 4 is configured as shown in Fig. 9.
Fig. 9.Controller block diagram of APDES in Mode 4.
If irradiation is low and is not sufficient for power generation, the flyback converter controls the input voltage without performing the MPPT, and generates the output current in the form of a rectified sine-wave. In addition, the APDES discharges energy and utilizes the decoupling technique. Fig. 10 shows a control block diagram of a flyback converter under Mode 5.
Fig. 10.Controller block diagram of flyback converter in Mode 5.
D. Frequency Control Method of the Proposed AC-module
In the proposed AC-module, the low input voltage caused by low irradiation can lead to an increased dp when a large output power is required. If D(t) becomes greater than the boundary duty DB in (13), a distortion is generated in the output current flow to the grid because the flyback converter is operated under the continuous conduction mode (CCM) [5], [16]. As a result, the power quality is decreased due to the distortion of the output current, which can be solved by applying frequency control techniques.
Fig. 11 shows the duty of the main switch Qm under Mode 5 without frequency control or DB of the AC-module. In this mode, the AC-module can operate under the CCM when D(t) exceeds DB. Therefore, the controller of the AC-module should confirm whether the AC-module operates under the CCM for each MPPT control period. The maximum boundary duty dp,max, which determines the operation mode, can be calculated from (14).
where is the RMS value of the grid voltage. Fig. 12 shows the relationship between DB and dp,ctrl. In the region where dp,ctrl is smaller than DB, the flyback converter operates with a fixed frequency control under the DCM. Variable frequency control is adopted in the region where dp,ctrl is higher than dp,max to maintain the DCM. Fig. 13 shows a waveform of the magnetizing inductor current under the variable frequency control.
Fig. 11.Duty and boundary duty flyback converter.
Fig. 12.Relationship between DB and dp,ctrl in variable frequency control.
Fig. 13.Waveform of magnetizing inductor current under variable frequency control.
The highest peak current flows through the primary side of the transformer when the converter operates under the boundary conduction mode (BCM). At this time, the peak current in the secondary stage isec,pk and its average value isec,pk,avg are described by (15) and (16).
Since the peak output power of the AC-module is twice the average output power, the switching frequency is derived by (16) and the output power reference.
IV. DESIGN OF THE APDES
A. Decoupling Capacitor Cin
If there is a steady-state error of the input power of the APDES, a voltage pulsation on the PV-panel occurs, which can lead to a failure of the MPPT control. The steady-state error PCin can be described as (18), where η refers to the efficiency of the APDES and refers to the reference of the input power of the APDES. Cin is used for reducing PCin. Thus, the compensated power from the decoupling capacitor can be described as (19).
where ΔVPV is the magnitude of the voltage ripple on the PV-panel. Using (19), the required capacitance for decoupling can be calculated as (20) because ΔVPV is much smaller than VPV.
B. Buffer Capacitor Cb
The buffer capacitor Cb has a voltage pulsation ΔVCb due to the input current of the APDES. If the minimum voltage of VCb (i.e., VCb,low) is lower than VPV, the APDES cannot perform the decoupling function. Therefore, the buffer capacitor should be designed to consider VCb,low. The required capacitance of the buffer capacitor can be calculated using (21).
C. Decoupling Inductor Ldec
The increment of idec in one switching period Δidec,Ts is determined by the decoupling inductance, Ldec, and the duty of Qbk1 and Qbst1.
Since the largest Δidec,Ts is required at idec=0, the decoupling inductance should be calculated at this point. The required decoupling inductance is calculated by (22).
D. Design Examples
In this section, it is assumed that the steady-state error of the input power of the APDES is 5% (i.e., η = 95%) under the full load condition (i.e., Po=125W,). In addition, the decoupling capacitance to satisfy 5% of the voltage ripple is calculated as 184μF using (20), where ω is 376.99rad/sec
When the APDES discharges energy from the battery, the proposed AC-module can generate more output power than the maximum power of the PV-panel. In this paper, the maximum output power of the PV-panel and AC-module are 125W and 200W, respectively. The average voltage of the buffer capacitor is controlled at 70V in the case of the MPPT condition (i.e., VPV=30V). Therefore, the minimum voltage of the buffer capacitor VCb,low should be higher than 30V. As a result, the buffer capacitance Cb is calculated as 161μF, where VCb,low is 40V. In this paper, Cin and Cb are selected as 272μF and 200μF, respectively.
Fig. 14.Voltage pulsation of PV-panel due to the steady-state error of input power of the APDES.
Fig. 15.Buffer capacitor voltage according to the power of the buffer capacitor.
The flyback inverter, which does not have an active power decoupling circuit, applies a bulk capacitance of 7.02mF in light of compensation and the margin of the instantaneous peak power ripples.
The sampling frequency and switching frequency of the proposed AC-module are 25kHz and 50kHz, respectively. According to the magnetizing inductance, the maximum duty ratio of the main switch is 0.7. Using (22), Ldec should be selected so that it is larger than 1.2mH, when Δidec,Ts is set as 0.15A. In this paper, Ldec is selected as 1.3mH.
The voltage stress of the main switch is calculated as 102.4V, and the maximum voltage of the switches in the APDES is 100V in the ideal case.
In addition, the maximum charging/discharging current and decoupling current are almost 5A and 11.5A, considering the current ripple and operation mode. Therefore, the switches are selected as shown in Table II considering the margin.
V. EXPERIMENTAL RESULT
A 125W laboratory prototype has been constructed and used to verify the performance of the proposed system. The prototype system is controlled by a 32-bit DSP TMS320F28069 (Texas Instruments) and is measured using a WaveSurfer 24MXs (Lecroy). An E4350B (Agilent) is used to simulate the PV-panel. According to the above design method, the decoupling capacitor was reduced to 272μF, which can then be replaced with a film capacitor. Using (21) and (22), the buffer capacitance and inductance are selected as 200μF and 1.3mH, respectively. Table I shows the parameters used in the experiments.
TABLE IPARAMETER OF APDES
TABLE IIRATED VOLTAGE AND CURRENT OF POWER DEVICES
Fig. 16 shows experimental results when the proposed AC-module is operated in Mode 3. The voltage of the PV-panel has a small ripple voltage of about 2.5V at 29.6V due to the active decoupling of the APDES. The voltage of the buffer capacitor is controlled by the average of 70V having a 120Hz ripple voltage. Since Po is the same as PPV, there is no offset on the decoupling current, the frequency of which is twice that of the grid frequency. In addition, the magnitude of the decoupling current is measured as 4.2A, which is equal to the output current of the PV-panel. The maximum efficiency is measured at 82.2%. This is because the power conversion is performed through 2 stages for the decoupling function.
Fig. 16.Experimental results when the APDES operates in Mode 3.
Fig. 17 shows experimental results when the APDES is operated in Mode 1. Because the output power reference of the AC-module is lower than PPV, the input current of the APDES is controlled with the offset for charging the surplus energy to the battery. PPV and Po are controlled at 125W and 80W, respectively. Thus, the input current of the APDES is controlled as sinusoidal waveforms which have an offset of 1.54A. The 43.2W of power (i.e., the 1.76A battery input current) is then charged to the battery. Since the generated power of the PV-panel is lower than the load demand, the battery should be discharged for compensating the power difference between PPV and Po.
Fig. 17.Experimental results when the APDES operates in Mode 1.
In this experiment, the output power command is 120W, and the output power of the solar simulator is 75W. Thus, the decoupling current has an offset of -1.663A which means the 44.82W output power of the APDES as shown in Fig. 18. The battery then discharges a current of 2.203A because the voltage of the battery is 24.18V.
Fig. 18.Experimental results when the APDES operates in Mode 2.
Fig. 19 shows experimental results of the proposed AC-module operating in Mode 4. In this mode, Qbk1 and Qbst1 of the APDES perform the MPPT control, while Qbk2 and Qbst2 charge the PV output power to the battery through the buffer capacitor voltage control. The output voltage of the PV simulator in the experimental results is 29.65V, and the output current is 4.30A.
Fig. 19.Experimental results when the APDES operates in Mode 4.
Thus, the output power of the solar simulator is 127.49W. The voltage of the buffer capacitor is controlled at 70.29V, and the current flowing into the battery is 4.316A. The voltage of the battery is 24.9V. Therefore, the charging power is 107.47W.
Fig. 20 shows experimental results when the APDES is operated in Mode 5. Because the PV-panel does not generate power in this mode, Po is fully supplied by the battery. In this case, the voltage of the decoupling capacitor is controlled as 31.38V. Since the solar cell has no output power, the decoupling current is always smaller than zero. The experimental results show that the decoupling current has an offset current of -3.042A, and that its peak value is smaller than zero. The discharge current from the battery is measured as 4.705A, and the voltage of the battery is 24.12V. Therefore, 113.76W of battery power is discharged and supplied to the grid.
Fig. 20.Experimental results when the APDES operates in Mode 5.
Fig. 21 shows waveforms of the primary current and the output current of the flyback converter. When the output power of the PV simulator is lower than 60W and the output power Po is applied at 200W, the flyback converter operates in the CCM because D(t) exceeds the boundary duty. Thus, the output current of the AC-module is distorted.
Fig. 21.Waveforms of the AC-module with low voltage, high output power condition in Mode 5.
Fig. 22 shows experimental results of the frequency control in order to prevent distortion of the output current by the CCM operation. The frequency of the flyback converter is calculated as 66kHz to generate an output power of 200W under the DCM using (17). Therefore, the flyback converter can operate in the DCM, and the distortion of the output current is compensated.
Fig. 22.Experimental results of the frequency control with low voltage, high output power condition in Mode 5.
VI. CONCLUSIONS
This paper proposes a grid-connected AC-module with active power decoupling and energy storage. In the proposed AC-module, the APDES, which is connected in parallel with the decoupling capacitor, compensates the power difference between PPV and Po. Therefore, the conventional input decoupling capacitor can be replaced with a film capacitor which has a lower capacitance and a higher MTBF. The proposed APDES also performs the energy storage function.
The proposed AC-module has five operation modes according to PPV, Po, and the SOC of the battery. In this paper, a control method for the AC-module is also presented in detail. When the output power of the PV-panel is low, the AC-module can operate in the CCM, and distortion occurs in the output current. In this paper, the frequency control method is adopted to solve this problem. The design method of the APDES is also proposed in this paper. Using this design method, the decoupling capacitance is reduced from 7.02mF to 272μF, so that it can be replaced with a film capacitor.
Although adding the APDES can result in a cost increase due to added components, proposed system can increase system reliability and achieve economic benefits through operating the ESS. The proposed topology along with its control and design method are verified through experimental results using a 125W laboratory prototype.
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