JSTS:Journal of Semiconductor Technology and Science

  • 제16권4호
  • /
  • Pages.405-414
  • /
  • 2016
  • /
  • 1598-1657(pISSN)
  • /
  • 2233-4866(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지
DOI QR코드

DOI QR Code

K-Nearest Neighbor Associative Memory with Reconfigurable Word-Parallel Architecture

  • 투고 : 2016.02.28
  • 심사 : 2016.06.07
  • 발행 : 2016.08.30
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

IC-implementations provide high performance for solving the high computational cost of pattern matching but have relative low flexibility for satisfying different applications. In this paper, we report an associative memory architecture for k nearest neighbor (KNN) search, which is one of the most basic algorithms in pattern matching. The designed architecture features reconfigurable vector-component parallelism enabled by programmable switching circuits between vector components, and a dedicated majority vote circuit. In addition, the main time-consuming part of KNN is solved by a clock mapping concept based weighted frequency dividers that drastically reduce the in principle exponential increase of the worst-case search-clock number with the bit width of vector components to only a linear increase. A test chip in 180 nm CMOS technology, which has 32 rows, 8 parallel 8-bit vector-components in each row, consumes altogether in peak 61.4 mW and only 11.9 mW for nearest squared Euclidean distance search (at 45.58 MHz and 1.8 V).

키워드

참고문헌

  1. J. Liu, M. A. Brooke, and K. Hirotsu, "A CMOS feedforward neural-network chip with on-chip parallel learning for oscillation cancellation," Neural Networks, IEEE Transactions on, 13 (5), pp. 1178-1186 , 2002. https://doi.org/10.1109/TNN.2002.1031948
  2. J. Liu, M. A. Brooke, and K. Hirotsu, "A CMOS feedforward neural-network chip with on-chip parallel learning for oscillation cancellation," Neural Networks, IEEE Transactions on, 13 (5), pp. 1178-1186 , 2002. https://doi.org/10.1109/TNN.2002.1031948
  3. P. Arena et al., "A CNN-based chip for robot locomotion control," Circuits and Systems I: Regular Papers, IEEE Transactions on, 52 (9), pp. 1862-11, 2005. https://doi.org/10.1109/TCSI.2005.852211
  4. H. Li, D. Zhang, and S. Foo, "A Stochastic Digital Implementation of a Neural Network Controller for Small Wind Turbine Systems," Power Electronics, IEEE Transactions on, 21 (5), pp. 1502-1507, 2006. https://doi.org/10.1109/TPEL.2006.882420
  5. T. Koickal et al., "Analog VLSI Circuit Implementation of an Adaptive Neuromorphic Olfaction Chip," Circuits and Systems I: Regular Papers, IEEE Transactions on, 54 (1), pp. 60-73, 2007. https://doi.org/10.1109/TCSI.2006.888677
  6. F. An, et al, "VLSI realization of learning vector quantization with hardware/software co-design for different applications," Japanese Journal of Applied Physics, 54, 04DE05, 2015. https://doi.org/10.7567/JJAP.54.04DE05
  7. D. Anguita, A. Bon, and S. A Ridella, "A digital architecture for support vector machines: theory, algorithm, and FPGA implementation," Neural Networks, IEEE Transactions on, 14 (5), pp. 993-1009, 2003. https://doi.org/10.1109/TNN.2003.816033
  8. D. Anguita and A. Boni, "Improved neural network for SVM learning," Neural Networks, IEEE Transactions on, vol. 13, pp. 1243-1244, 2002. https://doi.org/10.1109/TNN.2002.1031958
  9. S. S. Keerthi and E. G. Gilbert, "Convergence of a Generalized SMO Algorithm for SVM Classifier Design," Machine Learning, Vol. 46, pp. 351-360, 2002. https://doi.org/10.1023/A:1012431217818
  10. C. Kyrkou, and T. Theocharides, "A Parallel Hardware Architecture for Real-Time Object Detection with Support Vector Machines," Computers, IEEE Transactions on, 61 (6), pp.831-842 (2012). https://doi.org/10.1109/TC.2011.113
  11. T. M. Cover and P. E. Hart, "Nearest neighbor pattern classification," Information Theory, IEEE Transactions on, 13, pp. 21-27, (1967). https://doi.org/10.1109/TIT.1967.1053964
  12. E. S. Manolakos, and I. Stamoulias, "IP-cores design for the kNN classifier", in Proc. ISCAS, pp. 4133-4136, 2010.
  13. Md. A. Abedin, et al, "Mixed digital-analog associative memory enabling fully parallel nearest Euclidean distance search", Japanese Journal of Applied Physics, 46, pp.2231-2237, 2007. https://doi.org/10.1143/JJAP.46.2231
  14. E. Fix and J. L. Hodges. Discriminatory analysis, nonparametric discrimination: Consistency properties. Technical Report 4, USAF School of Aviation Medicine, Randolph fiels, TX, 1951
  15. T. M. Cover and P. E. Hart. Nearest neighbor pattern classification. IEEE Trans. Inform. Theory, IT-13(1): 21-27, 1967.
  16. S. Jiang, G. Pang, M. Wu, L. Kuang, An improved K-nearest-neighbor algorithm for text categorization, Expert Systems with Applications, Vol. 39 (1), pp. 1503-1509, 2012. https://doi.org/10.1016/j.eswa.2011.08.040
  17. F. Pan, B. Wang, X. Hu, and W. Perrizo, "Comprehensive vertical sample-based knn/lsvm classification for gene expression analysis," J. Biomed. Inform., vol. 37, pp. 240-248, 2004. https://doi.org/10.1016/j.jbi.2004.07.003
  18. H. Zhang, A. C. Berg, M. Maire, and J. Malik, "SVM-KNN: Discriminative nearest neighbor classification for visual category recognition," in International Conference on Computer Vision and Pattern Recognition, pp. 2126-2136, 2006.
  19. K. W. Hung and W. C. Siu, "Novel DCT-Based Image Up-Sampling Using Learning-Based Adaptive KNN MMSE Estimation," IEEE Transactions on Circuits and Systems for Video Technology, vol. 24, no. 12, pp. 2018-2033, 2014. https://doi.org/10.1109/TCSVT.2014.2329352
  20. F. An, et al, "A Coprocessor for Clock-Mappingbased Nearest Euclidean distance Search with Feature Vector Dimension Adaptability", in Proc. CICC, pp. 1-6 , 2014
  21. S. Sasaki, Masahiro Yasuda, and H. J. Mattausch., "Digital associative memory for word-parallel Manhattan-distance-based vector quantization", in Proc. ESSCIRC, pp. 185-188, 2012.
  22. T. Akazawa, S. Sasaki, and H. J. Mattausch, Word- Parallel Coprocessor Architecture for Digital Nearest Euclidean Distance Search, in Proc. ESSCIRC, 2013, pp. 267-270.
  23. T. Akazawa, S. Sasaki, and H. J. Mattausch, "Associative memory architecture for word-parallel smallest Euclidean distance search using distance mapping into clock-number domain," Japanese Journal of Applied Physics, 53, 04EE16, 2014. https://doi.org/10.7567/JJAP.53.04EE16
  24. F. An, K. Mihara, S. Yamasaki, L. Chen, and H. J. Mattausch, "Word-parallel Associative Memory for k-Nearest-Neighbor with Configurable Storage Space of Reference Vectors," IEEE Asian Solid- State Circuits Conference, pp. 14-4, 2015.
  25. E. A. Vittoz, et al, "Silicon-gate CMOS frequency divider for electronic wrist watch", Solide-State Circuits, IEEE Journal of, 7 (2), pp. 100-104, 1972. https://doi.org/10.1109/JSSC.1972.1050254