KEPCO Journal on Electric Power and Energy

Korea Electric Power Corporation (한국전력공사)
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Experimental Study for Gate Trap and Generation Current using DCIV Method

  • Kim, Young Kwon (School of Electronics and Computer Engineering, Chonnam National University) ;
  • Lee, Dong Bin (School of Electronics and Computer Engineering, Chonnam National University) ;
  • Choi, Won Hyeok (School of Electronics and Computer Engineering, Chonnam National University) ;
  • Park, Taesik (Department of Electrical Engineering, Mokpo National University) ;
  • Lee, Myoung Jin (School of Electronics and Computer Engineering, Chonnam National University)
  • Received : 2015.08.28
  • Accepted : 2016.05.04
  • Published : 2016.06.30
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Abstract

The newly proposed analysis method using a direct-current current-voltage (DCIV) simulation is introduced for investigating leakage current composing MOS transistor. From comparing the density and location of traps using DCIV method and investigating the leakage current of gate channel transistor, we proposed the graphical analysis method to correlate the DCIV current and leakage mechanism by the traps. And, our graphical method intuitively explains that leakage current in MOS transistor is well correlated with the DCIV current of the MOS transistor arrays due to two kinds of traps created by Fowler-Nordheim (F-N) stress and Hot carrier stress, respectively.

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References

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