I. INTRODUCTION
Recently a number of major companies and universities have become increasingly interested in studies on topologies for generating output voltage through a group of modules with power semiconductor switches and capacitors, which construct a power converter in the form of a series of connections between the modules. These studies are leading to dramatic improvements in high voltage power systems. In particular, modular multi-level converters (MMCs) are preferably chosen for high voltage power converters such as VSC HVDC and STATCOM systems due to the merits of easily increasing the number of modules in series a connection and reducing the switching frequency [1]-[4].
To create an output voltage through MMCs, the modulation methods are divided into two groups, which are the space vector and voltage level based algorithms as shown in Fig. 1 [5].
Fig. 1.Multilevel converter modulation classification.
Among all of the modulation methods for multilevel converters, the most widely used methods are as follows:
Level-Shifted Carrier (LSC) PWM, Phase-Shifted Carrier (PSC) PWM [6], Selective Harmonic Elimination (SHE) [7], and Nearest Level Control (NLC) [8].
Fig. 2 shows four modulation methods for the output voltage generation of MMCs. In many previous studies, the PSC PWM method is suitable for low level MMCs, while the NLC method is suitable for high level MMCs. In low level MMCs, the PSC PWM method has a low total harmonic distortion (THD). In comparison, the NLC method has a high total harmonic distortion. However, the PSC PWM method increases the number of computations as the number of series connections increases. They need to produce as many carriers as the number of SMs connected in series, while the NLC method has a smaller computational burden because it uses the round-off method for determining the voltage level.
Fig. 2.Waveform generation by various modulation methods.
Considering the rating of a 20MW VSC HVDC system with a relatively lower voltage level, the PSC PWM method is the most appropriate method because it can accept a small harmonic filter operated at a fixed switching frequency, does not require a sorting algorithm, and leads to easy implementation of control.
As the power level of converters increases, the number of Sub-Modules (SMs) connected in series also rises. In addition, for the sake of upgrading reliability, several redundant SMs are additionally included. The control techniques with these redundant SMs vary depending on the applied modulation methods. In this study, the control techniques for redundant SMs are examined and a new PSC PWM method considering redundant SMs is proposed.
II. BASIC PSC PWMMODULATION METHODS FOR A VSC HVDC
A case model, Fig. 3 has been presented in order to examine the characteristics of the VSC HVDC’s modulation methods.
Fig. 3.Three-phase modular multilevel converter.
Fig. 3 describes a 3-phase MMC for a VSC HVDC in which three independent phase units are connected. Each phase unit consists of an upper arm and a lower arm. In addition, each arm consists of multiple SMs connected in series. The SMs are referred to as Half-Bridge Sub-Modules (HBSMs). Each arm has a total of N SMs. In Fig. 4, for generating N+1 levels of arm voltage with PSC PWM, there should be N triangular carriers, which are shifted by 2π/N, with a frequency of Freqoriginal and a reference voltage. Each SM generates switching pulses by comparing the reference signal with the corresponding triangular carrier wave.
Fig. 4.PSC PWM method (N=10).
In general MMC modulation, such as NLC, a sorting algorithm is commonly used for voltage balancing of the capacitors. However, under the PSC PWM method, the voltage balancing can be achieved by adjusting the reference signal of each SM by equations (1) and (2). Therefore, a sorting algorithm is not necessary [6].
Fig. 5.Block-diagram of the PSC PWM method.
Where Vref_j is the reference signal of SMj, Vc_avg is the average of the capacitor voltages of the SMs of each arm, Vcj is the capacitor voltage of SMj, iarm is the arm current, and Δuref_j is the reference adjustment of SMj.
The PSC PWM method has some advantageous features in a MMC
III. THE CONTROL OF REDUNDANT SMS IN PSC PWM
In a general MMC, a voltage level of N+1 is generated by that number of N SMs per arm. However, several redundant SMs are also used in preparation for possible SM failures so that a system can operate more reliably. To operate a system with N+M SMs by adding M redundant SMs per arm, N SMs must always operate normally, with M SMs in a stand-by state. To make the system work properly when a SM failure occurs, the redundant SMs must start to work the moment of a failure occurs. At this time, the HVDC system must operate normally without any transient. Thus, the DC voltage of the N+M SMs must be maintained at Vdc/N at all times. Therefore, all of the N+M SMs, including the redundant SMs, must engage in switching to maintain a constant dc capacitor voltage balance [9], [10].
In other words, the N+M SMs take turns. However, only the N SMs are required to engage in the instantaneous generation of the voltage level of N+1. The following shows the voltage and switching frequency of each SM [10].
The switching frequency reduction is:
Where VCuj and VClj are the dc capacitor voltages of SMj in the upper and lower arms, respectively.
If the NLC method is used for MMC control using redundant SMs, the system can be easily implemented without much difference from the existing modulation method. Looking more specifically, N SMs engage in the balancing control of the dc capacitor voltage, and the M SMs with the highest or lowest dc capacitor voltage are kept on at the OFF state and do not engage in switching [9], [10].
However, in the PSC PWM method it is not easy to control redundant SMs. To generate N+1 level voltage with the PSC PWM method, a total of N phase-shifted carriers are used to determine the switching state of N SMs. In this case, M redundant SMs must maintain a non-operating status even without carriers. In the PSC PWM method it is difficult to rotate SMs for switching because the method itself does not conduct such a control of the dc capacitor voltage balancing like the sorting algorithm does. Therefore, to control redundant SMs, an additional control is required as can be seen in Fig. 7.
Fig. 6.MMC with redundant SMs.
Fig. 7.General redundant SM control in the PSC PWM.
Fig. 7(a) shows the referenced voltage and the N phase-shifted carrier. If the value of the voltage reference is between -1 and 1, the carrier has a triangular waveform with a minimum value of -1 and a maximum value of 1. For each SM, the voltage reference is compared with the triangular carrier allocated to the SM, and the SM is turned ON if the voltage reference is larger than the carrier, and it is turned OFF if the voltage reference is smaller than the carrier. In this case, only N SMs, of which a carrier has been allocated, engage in switching, while the remaining M redundant SMs are kept constantly OFF. To engage the redundant SMs in switching, the rotation of N carriers N+M SMs is required, as shown in Fig. 7(b). This control method creates an increase in the switching frequency because the carrier is continuously shifted. During this shift the switching state is also simultaneously changed. This causes an unnecessary switching to occur. It is also difficult to implement a control in this case because the carrier must be continuously rotated in order to keep the switching frequency of each SM the same.
In this study, a new PSC PWM method is proposed that will correct the problem of redundant SM control in the existing PSC PWM methods.
Fig. 8 shows the new proposed PSC PWM method. Fig. 8(a) shows the top and bottom of the triangular waveform of the carrier, which is formed to be asymmetric. The following equations show the maximum peak value and the minimum peak value of the triangular waveform of the carrier.
Fig. 8.Proposed redundant SM control in the PSC PWM.
The proposed PSC PWM method generates N+M asymmetric carriers, which are shifted by 2π/(N+M). As shown in Fig. 8(b), N+M carriers are applied to N+M SMs. By the proposed PSC PWM method, an N+1 level voltage can be generated without rotating the carriers, and it is much easier to implement controllers because each SM is allocated to only one carrier. In addition, the unnecessary switching that occurs when the carrier is shifted can be removed and the switching frequency of each SM can be lowered at a rate of N/(N+M).
Fig. 9 shows the voltage reference, carrier1 allocated to SM1 (represented by a bold line), and an 11-level voltage using the proposed PSC PWM method. In the section where the triangular carrier ascends, the ON/OFF state of the SM is determined by comparing the carrier with the voltage reference. If the carrier is larger than 1, the voltage reference will always be smaller than the carrier, and consequently the SM will remain OFF. In the descending section, if the carrier is smaller than 1, the carrier is also compared to the voltage reference. This means that the SM will remain OFF in the M/(N+M) section during one carrier cycle. This also creates the same effect as when carrier1 is shifted to Carrier1+M per cycle under the conventional PSC PWM method. In this way, the proposed method can control redundant SMs with carrier rotation despite a carrier being fixed to each SM. In addition, the 11-level output voltage waveform is same as the output voltage of the general PSC PWM method in Fig. 4.
Fig. 9.Proposed PSC PWM method (N=10, M=2).
As shown in Fig. 10, comparing the carrier signals of the general PSC PWM with the proposed PSC PWM, it is noted that the switching frequency of the proposed PSC PWM is decreased from 200Hz to 167Hz.
Fig. 10.Comparison of carrier signals.
The proposed PSC PWM method has some advantageous features:
On the other hand, when one SM fails, it is necessary to generate N+M-1 carrier signals for the normal SMs.
IV. SIMULATION AND EXPERIMENTAL RESULTS
A. PSCAD/EMTDC Simulation
A simulation model, as shown in Fig. 11, has been constructed in order to validate the proposed PSC PWM method for an MMC using redundant SMs. This model is in the form of an H-bridge that features two different converter valves sharing a DC link voltage and an output terminal with an LC resonance load. The upper and lowers arm of each converter valve consist of 10 normal operation SMs and 2 redundant SMs, respectively (N =10, M =2). The voltage of the DC link is 24kV, and the dc capacitor voltage of all of the SMs is 2.4kV( = Vdc / N). The rated current of each arm is 750 Arms, and the rated output current is 1,230 Arms.
Fig. 11.PSCAD/EMTDC simulation model.
The two converter valves generate two voltage waveforms of the same magnitude with a slight phase difference. The voltage difference between the two converters leads to a flow of load currents in the LC resonance load. Due to the nature of the resonance load, the load currents flowing with a slight voltage difference make it easy to check and monitor the modulation performance.
Fig. 12 shows the result of a simulation using the proposed PSC PWM method in which 12 vertically asymmetric phased-shifted triangular carriers (-1.0 to 1.4) were applied. Due to the proposed PSC PWM method having regular switching between the SMs, the dc capacitor voltages of the 12 SMs, including the redundant SMs, are regulated to be 2.4kV throughout this simulation. The output voltage, output currents, and arm currents were also consistent at the rated voltage and rated current.
Fig. 12.PSCAD/EMTDC simulation result.
The test system has only an open loop controller, which controls only the phase difference between the two converter valves, in order to validate the converter valve modulation. Thus, the arm current and output current have a number of harmonics. If a feedback controller such as circulating current control is used, the arm current and output current are almost sinusoidal.
In addition, when a fault occurs in a single SM of the arm, the remaining 11 SMs perform the same function through regeneration of the 11 asymmetric phased-shifted triangular carriers (-1.0 to 1.2) for the 11 SMs. As shown in Fig. 13, the control is effective without any transients under the single SM fault condition.
Fig. 13.PSCAD/EMTDC simulation result for a failure of SM.
B. RTDS HILS Test
The proposed PSC PWM method has been validated through actual controllers and an RTDS simulator. Considering the number of converter valves and the rating, the control system has been designed to control 12 SMs per arm. This, as in the PSCAD simulation, and the controller having been designed as an FPGA-based one, allow for the simultaneous control of multiple SMs. For the PSC PWM, as shown in Fig. 14, the model has been designed to generate a total of 12 carriers through the carrier generator block and to deliver them to each of the SM control blocks. Implementing the controller has been greatly simplified because there are no rotating carriers or dc capacitor voltage balancing control such as a sorting algorithm.
Fig. 14.FPGA block for the proposed PSC PWM.
Fig. 15 shows the RTDS HILS test system for testing the proposed PSC PWM method. It consists of RTDS, FPGA based controllers, RTDS interface boards for connection between the FPGA based controller and the RTDS, and HMI for operations.
Fig. 15.RTDS simulation set for the proposed PSC PWM.
Fig. 16 shows the results of the test on the proposed PSC PWM method through the RTDS. Like the results of the PSCAD/EMTDC simulation, it has been verified that the 12 SMs, including the redundant modules per arm, maintain the rated voltage and rated current at a consistent level while also simultaneously maintaining the dc capacitor voltage at a consistent level. In addition, when a fault occurs in a single SM of an arm, the remaining 11 SMs perform the function without any transients.
Fig. 16.RTDS HILS test result using the proposed PSC PWM.
C. 11-level MMC Converter Test
To further validate the proposed PSC PWM method a test has been conducted through the actual converter valves. For the testing of the control, the same test was conducted by using the validated FPGA-based controller.
Fig. 17 shows the test system for the 11-level MMC. As in the simulation model, the test system has been built by connecting 12 SMs (10 normal SMs and 2 redundant SMs) per arm, 48 SMs in total, 4 arm reactors, and an LC resonance load. The dc link voltage is 24kV and the dc voltage of each SM is 2.4kV. The rated arm current is 750Arms and the output current is 1,230Arms.
Fig. 17.The test system for the 11-level MMC.
Fig. 18 shows the results of the test on the 11-level MMC conducted using the proposed PSC PWM method. The results of the test were evaluated to be the same as those of the RTDS test. The system also properly operated at the rated voltage and rated current, generating an 11-level voltage through the redundant SM control by the proposed PSC PWM method.
Fig. 18.11-level MMC test result of the proposed PSC PWM.
V. CONCLUS
This study has examined a control method containing redundant SMs on the modulation methods for MMCs. A new PSC PWM method has been proposed in order to achieve easier application and to solve the redundant control problems encountered in the general PSC PWM method. As a result of the testing of the proposed PSC PWM method in an 11-level MMC (10 operating SMs and 2 redundant SMs) through PSCAD/EMTDC simulation, it has been verified that the voltage of all of the SMs remains consistent and that the switching frequency of each SM has been reduced. In addition, according to the result of an RTDS HILS test on an actual controller using the proposed PSC PWM method and a test conducted by applying it directly to an actual 11-level converter, the system properly operates at the rated voltage and rated current, and that implementing the control has been successfully improved.
References
- A. Lesnicar and R. Marquardt, "An innovative modular multilevel converter topology suitable for a wide power range," IEEE Power Tech Conference Proceedings, Vol. 3, Jun. 2003.
- R. Marquardt and A. Lesnicar, "A new modular voltage source inverter topology," in EPE 2003, 2003.
- S. Allebrod, R. Hamerski, and R. Marquardt, "New transformerless, scalable modular multilevel converters for HVDC-transmission," in IEEE Power Electronics Specialists(PESC), pp. 174-179. Jun. 2008.
- J. Dorn, H. Huang, and D. Retzmann, "Novel voltage-sourced converters for HVDC and FACTS applications," in Proc. CIGRE Meeting 2007, pp. 314-321, 2007.
- L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, “The age of multilevel converters arrives,” IEEE Ind. Electron. Mag., Vol. 2, No. 2, pp. 28-39, Jun. 2008. https://doi.org/10.1109/MIE.2008.923519
- B. Li, R. Yang, D. Xu, G. Wang, W. Wang, and D. Xu, “Analysis of the phase-shifted carrier modulation for modular multilevel converter,” IEEE Trans. Power Electron., Vol. 30, No. 1, pp. 297-310, Jan. 2015. https://doi.org/10.1109/TPEL.2014.2299802
- G. S. Konstantinou, M. Ciobotaru, and V. G. Agelidis, "Operation of a modular multilevel converter with selective harmonic elimination PWM," in IEEE 8th International Conference on Power Electronics and ECCE Asia(ICPE & ECCE), May/Jun. 2011.
- P. M. Meshram and V. B. Borghate, “A simplified nearest level control (NLC) voltage balancing method for modular multilevel converter(MMC),” IEEE Trans. Power Electron., Vol. 30, No. 1, pp. 450-462, Jan. 2015. https://doi.org/10.1109/TPEL.2014.2317705
- G. T. Son, H.-J. Lee, T. S. Nam, Y.-H. Chung, U. H. Lee, S. T. Baek, K. Hur, and J. W. Park, “Design and control of a modular multilevel HVDC converter with redundant power modules for noninterruptible energy transfer,” IEEE Trans. Power Del., Vol. 27, No. 3, pp. 1611-1619, Jul. 2012. https://doi.org/10.1109/TPWRD.2012.2190530
- G. Konstantinou, J. Pou, S. Ceballos, and V. G. Agelidis, “Active redundant submodule configuration in modular multilevel converters,” IEEE Trans. Power Del., Vol. 28, No. 4, pp. 2333-2341, Oct. 2013. https://doi.org/10.1109/TPWRD.2013.2264950
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