Journal of the Institute of Electronics and Information Engineers (전자공학회논문지)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지
DOI QR코드

DOI QR Code

Design of A Piecewise Polynomial Model Based Digital Predistortion for 60 GHz Power Amplifier

60 GHz 대역 전력 증폭기를 위한 구간별 차등 다항식 모델 기반의 디지털 사전왜곡기 설계

  • Kim, Minho (Dept. of Electronic Engineering, Sogang University) ;
  • Lee, Jingu (Dept. of Electronic Engineering, Sogang University) ;
  • Kim, Daehyun (Dept. of Electronic Engineering, Sogang University) ;
  • Kim, Younglok (Dept. of Electronic Engineering, Sogang University)
  • Received : 2015.10.02
  • Accepted : 2016.04.28
  • Published : 2016.05.25
Download PDF
⟨ Previous Next ⟩

Abstract

Recently, the study on 5G mobile communication systems using the millimeter-wave frequency band have been actively promoted and the importance of compensation of the nonlinearity of power amplifier caused by the characteristics of millimeter-wave frequency propagation attenuation is increasing. In the paper, we propose a piecewise polynomial model based on subdivision coefficient which are characteristics of power amplifier separated linear section and a non-linear section. In addition, the structure of digital predistortion based on the proposed model and direct learning method are proposed to implement a digital predistortion. To verify the proposed model, digital predistortion based on the proposed model and direct learning method for 60 GHz power amplifier using LTE signal implemented in the FPGA. And the hardware test bench measured performance and complexity. The proposed model achieves 3.3 dB gain over the single polynomial model in terms of the ACLR and reduces 7.5 percent in terms of the complexity.

최근 들어, 밀리미터파 대역을 활용하는 5세대 이동 통신 시스템에 대한 연구가 활발히 진행되고 있으며, 밀리미터파 대역의 전파 감쇠 특성으로 인하여 전력 증폭기의 비선형성을 완화시키는 방법의 중요성이 증가하고 있다. 본 논문에서는 전력 증폭기의 특성을 선형구간과 비선형구간을 구분하여 구간별 계수를 사용하는 구간별 차등 다항식 모델을 제안하였다. 또한, 제안된 모델과 직접 학습 방식을 이용하여 디지털 사전왜곡기 구현 방안을 제시하였다. 제안된 모델의 성능을 검증하기 위하여 LTE 신호를 인가한 60 GHz 대역 전력증폭기를 위한 제안된 모델과 직접 학습 방식에 기반한 디지털 사전왜곡기를 FPGA로 구현하였고 하드웨어 테스트벤치를 통하여 성능 및 연산 복잡도를 비교 검증하였다. 제안된 모델은 기존 단일 다항식 모델 대비 ACLR 측면에서는 3.3 dB 개선됨을 보였으며 연산 복잡도 측면에서는 7.5 % 감소됨을 보여주었다

Keywords

References

  1. S. G Glisic, Advanced Wireless Communications, 4G Technologies, Wiley, 2004.
  2. N. Guo, RC Qiu, S. Mo, and K Takahashi, "60-GHz millimeter-wave radio: Principle, technology, and new results." EURASIP Journal on Wireless Communications and Networking., vol. 2007, no. 1, pp.48-38, Jan. 2007.
  3. J. Wells, "Faster than fiber: The future of multi-Gb/s wireless", IEEE Microwave Mag., vol. 10, no. 3, pp. 104-112, May 2009. https://doi.org/10.1109/MMM.2009.932081
  4. D. Lockie, D. Peck, "High-data-rate millimeter-wave radios", IEEE Microwave Mag., vol. 10, no. 5, pp. 75-83,Aug. 2009. https://doi.org/10.1109/MMM.2009.932834
  5. S. C. Cripps, RF Power Amplifiers for Wireless Communications, Northwood, MA: Artech House 1999.
  6. A. S. Wright and W. G. Durtler, "Experimental performance of an adaptive digital linearized power amplifier," IEEE Trans. Veh. Technol., vol. 41, no. 4, pp. 395-400, Nov. 1992. https://doi.org/10.1109/25.182589
  7. L. Ding, G. T. Zhou, D. R. Morgan, Z. Ma, J. S. Kenney, J. Kim, and C. R. Giardina, "A robust digital baseband predistorter constructed using memory polynomial", IEEE Trans. Commun., vol. 52, no. 1 pp. 159-165, Jan. 2004. https://doi.org/10.1109/TCOMM.2003.822188
  8. D. R. Morgan, Z. Ma, J. Kim, M. G. Zierdt, and J. Pastalan, "A Generalized Memory Polynomial Model for Digital Predistortion of RF Power Amplifiers." IEEE Trans. Signal Process., vol.54, no. 10, pp. 3852-3860, Oct. 2006. https://doi.org/10.1109/TSP.2006.879264
  9. C. Quindroit, N. Naraharisetti, P. Roblin, S. Gheitanchi, V. Mauer, and M. Fitton, "Concurrent dual-band digital predistortion for power amplifier based on orthogonal polynomials", IEEE MTT-S Int. Microw. Symp. Dig., 2013.
  10. M. Ghaderi, S. Kumar, and D. E. Dodds, "Fast adaptive polynomial I and Q predistorter with global optimization", IEEE Proc. Commun., vol. 143, no. 2, pp. 78-86, Apr. 1996. https://doi.org/10.1049/ip-com:19960237
  11. Manjung Seo, Heesung Shim, Sungbin Im, and Seungmo Hong, "A Canonical Piecewise-Linear Model-Based Digital Predistorter for Power Amplifier Linearization", Journal of The Institute of Elecotronics and Inforamtion Engineers Vol.47, No.2, pp. 9-17, Feb. 2010.
  12. Manjung Seo, Seokhun Jeon, and Sungbin Im, "A SCPWL Model-Based Digital Predistorter for Nonlinear High Power Amplifier Linearization", Journal of The Institute of Elecotronics and Inforamtion Engineers Vol.47, No.10, pp. 8-16, Oct. 2010.
  13. X. Li, W. Lv, F. Li, "High order inverse polynomial predistortion for memoryless RF power amplifiers", 5th IET International Conference on Wireless, Mobile and Multimedia Netwroks (ICWMMN 2013), pp. 335-338, Beijing, China, Nov, 2013.
  14. C. Eun, E. J. Powers, "A new Volterra predistorter based on the indirect learning architecture", IEEE Trans.Signals Process., vol. 45, no. 1, pp. 223-227, Jan. 1997. https://doi.org/10.1109/78.552219
  15. A. Zhu, J. C. Pedro, and T. J. Brazil, "Dynamic deviation reduction based Volterra behavioral modeling of RF power amplifiers", IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4323-4332, Dec. 2006. https://doi.org/10.1109/TMTT.2006.883243
  16. Minglu Jin, Sooyoung Kim Shin, and Deockgil Oh, "Piecewise Polynomial Predistorter for Power Amplifier," Proceeding of CIC' 2002, Seoul, Korea, Nov. 2002.
  17. A. Zhu, P. J. Draxler, J. J. Yan, T. J. Brazil, D. F. Kimball, and P. M. Asbeck, "Open-loop digital predistorter for RF power amplifiers using dynamic deviation reduction-based Volterra series," IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1524-1534, Jul. 2008. https://doi.org/10.1109/TMTT.2008.925211