The Journal of Korean Institute of Electromagnetic Engineering and Science (한국전자파학회논문지)

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
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Design of a W-Band Power Amplifier Using 65 nm CMOS Technology

65 nm CMOS 공정을 이용한 W-대역 전력증폭기 설계

  • Kim, Jun-Seong (College of Information & Communication Engineering, Sungkyunkwan University) ;
  • Kwon, Oh-yun (College of Information & Communication Engineering, Sungkyunkwan University) ;
  • Song, Reem (College of Information & Communication Engineering, Sungkyunkwan University) ;
  • Kim, Byung-Sung (College of Information & Communication Engineering, Sungkyunkwan University)
  • 김준성 (성균관대학교 정보통신대학) ;
  • 권오윤 (성균관대학교 정보통신대학) ;
  • 송림 (성균관대학교 정보통신대학) ;
  • 김병성 (성균관대학교 정보통신대학)
  • Received : 2016.01.12
  • Accepted : 2016.02.26
  • Published : 2016.03.31
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Abstract

In this paper, we propose 77 GHz power amplifier for long range automotive collision avoidance radar using 65 nm CMOS process. The proposed circuit has a 3-stage single power amplifier which includes common source structure and transformer. The measurement results show 18.7 dB maximum voltage gain at 13 GHz 3 dB bandwidth. The measured maximum output power is 10.2 dBm, input $P_{1dB}$ is -12 dBm, output $P_{1dB}$ is 5.7 dBm, and maximum power add efficiency is 7.2 %. The power amplifier consumes 140.4 mW DC power from 1.2 V supply voltage.

본 논문에서는 차량 충돌 방지 장거리 레이더(Long Range Radar: LRR)을 위한 77 GHz 전력증폭기를 65 nm CMOS 공정을 이용하여 설계하였다. 제안한 회로는 3단 차동 전력증폭기로 공통 소스 구조와 트랜스포머를 사용했다. 측정결과로 77 GHz에서 18.7 dB의 전압 이득과 13 GHz의 3 dB 대역폭을 얻었다. 측정된 최대 출력 전력은 10.2 dBm, 입력 $P_{1dB}$는 -12 dBm, 출력 $P_{1dB}$는 5.7 dBm이며, 측정된 최대 전력 효율은 7.2 %이다. 본 전력증폭기는 1.2 V의 공급전원으로부터 140.4 mW의 DC 전력을 소모한다.

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References

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