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Common-Mode Voltage Elimination for Medium-Voltage Three-Level NPC Inverters Based on an Auxiliary Circuit

  • Le, Quoc Anh (Department of Electronic Engineering, Yeungnam University) ;
  • Lee, Sangmin (Department of Electronic Engineering, Yeungnam University) ;
  • Lee, Dong-Choon (Department of Electronic Engineering, Yeungnam University)
  • Received : 2016.05.13
  • Accepted : 2016.07.09
  • Published : 2016.11.20

Abstract

In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

Keywords

References

  1. J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, "Multilevel voltage-source-converter topologies for industrial medium-voltage drives," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 2930-2945, Dec. 2007.
  2. S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, J. Rodriguez, M. A. Perez, and J. I. Leon, "Recent advances and industrial applications of multilevel converters," IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2553-2580, Aug. 2010. https://doi.org/10.1109/TIE.2010.2049719
  3. H. Abu-Rub, J. Holtz, and J. Rodriguez, "Medium-voltage multilevel converters - State of the art, challenges, and requirements in industrial applications," IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2581-2596, Aug. 2010. https://doi.org/10.1109/TIE.2010.2043039
  4. B. Wu, "Diode clamped multilevel inverters," in High-power converters and AC drives, 1st ed., A John Wiley & Sons, Inc., pp. 143-177, 2006.
  5. J. Rodriguez, S. Bernet, P. K. Steimer, and I. E. Lizama, "A survey on neutral-point-clamped inverters," IEEE Trans. Ind. Electron., Vol. 57, No. 7, pp. 2219-2230, Jul. 2010. https://doi.org/10.1109/TIE.2009.2032430
  6. T. D. Nguyen, D. Q. Phan, D. N. Dao, and H. H. Lee, "Carrier phase-shift PWM to reduce common-mode voltage for three-level T-type NPC inverters," Journal of Power Electronics, Vol. 14, No. 6, pp. 1197-1207, Nov. 2014. https://doi.org/10.6113/JPE.2014.14.6.1197
  7. S. Ogasawara, H. Ayano, and H. Akagi, "An active circuit for cancellation of common-mode voltage generated by a PWM inverter," IEEE Trans. Power Electron., Vol. 13, No. 5, pp. 835-841, Aug. 1998. https://doi.org/10.1109/63.712285
  8. M. M. Swamy, K. Yamada, and T. Kume, "Common mode current attenuation techniques for use with PWM drives," IEEE Trans. Power Electron., Vol. 16, No. 2, pp. 248-255, Mar. 2001. https://doi.org/10.1109/63.911149
  9. C. Mei, J. C. Balda, and W. P. Waite, "Cancellation of common-mode voltages for induction motor drives using active method," IEEE Trans. Energy Convers., Vol. 21, No. 2, pp. 380-386, Jun. 2006. https://doi.org/10.1109/TEC.2005.859983
  10. A. M. Hava and E. Un, "Performance analysis of reduced common-mode voltage PWM methods and comparison with standard PWM methods for three-phase voltagesource inverters," IEEE Trans. Power Electron., Vol. 24, No. 1, pp. 241-252, Jan. 2009. https://doi.org/10.1109/TPEL.2008.2005719
  11. S. K. Mun and S. Kwak, "Reducing common-mode voltage of three-phase VSIs using the predictive current control method based on reference voltage," Journal of Power Electronics, Vol. 15, No. 3, pp. 712-720, May 2015. https://doi.org/10.6113/JPE.2015.15.3.712
  12. M. M. Renge and H. M. Suryawanshi, "Five-level diode clamped inverter to eliminate common mode voltage and reduce dv/dt in medium voltage rating induction motor drives," IEEE Trans. Power Electron., Vol. 23, No. 4, pp. 1598-1607, Jul. 2008. https://doi.org/10.1109/TPEL.2008.925423
  13. G. Scelba, A. Testa, M. Cacciato, S. D. Caro, and G. Scarcella, "Improved space-vector modulation technique for common mode currents reduction," IET Power Electron., Vol. 6, No. 7, pp. 1248-1256, Aug. 2013. https://doi.org/10.1049/iet-pel.2012.0701
  14. A. K. Gupta and A. M. Khambadkone, "A space vector PWM scheme to reduce common mode voltage for a cascaded multilevel inverter," in 37th IEEE Power Electronics Specialists Conference, pp. 1-7, 2006.
  15. A. Ojha, P. Chaturvedi, A. Mittal, and S. Jain, "Carrier based common mode voltage reduction techniques in neutral point clamped inverter based AC-DC-AC drive system," Journal of Power Electronics, Vol. 16, No. 1, pp. 142-152, Jan. 2016. https://doi.org/10.6113/JPE.2016.16.1.142
  16. Z. Zhao, Y. Zhong, H. Gao, L. Yuan, and T. Lu, "Hybrid selective harmonic elimination PWM for common-mode voltage reduction in three-level neutral-point-clamped inverters for variable speed induction drives," IEEE Trans. Power Electron., Vol. 27, No. 3, pp. 1152-1158, Mar. 2012. https://doi.org/10.1109/TPEL.2011.2162591
  17. Q. A. Le and D. C. Lee, "Common-mode voltage elimination in three-level NPC inverters for medium voltage motor drives," in ISEE 2015, pp. 272-278, 2015.
  18. H. J. Kim, H. D. Lee, and S. K. Sul, "A new PWM strategy for common-mode voltage reduction in neutral-point-clamped inverter-fed AC motor drives," IEEE Trans. Ind. Appl., Vol. 37, No. 6, pp. 1840-1845, Aug. 2002.
  19. A. Videt, P. Le Moigne, N. Idir, P. Baudesson, and X. Cimetiere, "A new carrier-based PWM providing common-mode-current reduction and DC-bus balancing for three-level inverters," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 3001-3011, Jan. 2008. https://doi.org/10.1109/TIE.2007.907001
  20. M. C. Cavalcanti, A. M. Farias, K. C. Oliveira, F. A. S. Neves, and J. L. Afonso, "Eliminating leakage currents in neutral point clamped inverters for photovoltaic systems,"IEEE Trans. Ind. Electron., Vol. 59, No. 1, pp. 435-443, Jan. 2012. https://doi.org/10.1109/TIE.2011.2138671
  21. J.-S. Lee and K.-B. Lee, "New modulation techniques for a leakage current reduction and a neutral-point voltage balance in transformerless photovoltaic systems using a three-level inverter," IEEE Trans. Power Electron., Vol. 29, No. 4, pp. 1720-1732, Apr. 2014. https://doi.org/10.1109/TPEL.2013.2264954
  22. L. Helle, S. Munk-Nielsen, and P. Enjeti, "Generalized discontinuous DC-link balancing modulation strategy for three-level inverters," in Proc. Power Convers. Conf. 2002, Vol. 2, pp. 359-366, 2002.