Journal of the Korea Institute of Information and Communication Engineering (한국정보통신학회논문지)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
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Design of 24-GHz Power Amplifier for Automotive Collision Avoidance Radars

차량 추돌 방지 레이더용 24-GHz 전력 증폭기 설계

  • Noh, Seok-Ho (Department of Electronics Engineering, Andong National University) ;
  • Ryu, Jee-Youl (Department of Information and Communications Engineering, Pukyong National University)
  • Received : 2015.09.09
  • Accepted : 2015.10.19
  • Published : 2016.01.31
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Abstract

In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

본 논문에서는 차량 추돌 방지 단거리 레이더용 24-GHz CMOS 고주파 전력 증폭기 (RF power amplifier)를 제안한다. 이러한 회로는 클래스-A 모드 증폭기로서 단간 (inter-stages) 공액 정합 (conjugate matching) 회로를 가진 공통-소스 단으로 구성되어 있다. 제안한 회로는 TSMC $0.13-{\mu}m$ 혼성신호/고주파 CMOS 공정 ($f_T/f_{MAX}=120/140GHz$)으로 설계하였다. 2볼트 전원전압에서 동작하며, 저전압 전원에서도 높은 전력 이득, 낮은 삽입 손실 및 낮은 음지수를 가지도록 설계되어 있다. 전체 칩 면적을 줄이기 위해 넓은 면적을 차지하는 실제 인덕터 대신 전송선(transmission line)을 이용하였다. 설계한 CMOS 고주파 전력 증폭기는 최근 발표된 연구결과에 비해 $0.1mm^2$의 가장 작은 칩 크기, 40mW의 가장 적은 소비전력, 26.5dB의 가장 높은 전력이득, 19.2dBm의 가장 높은 포화 출력 전력 및 17.2%의 가장 높은 최대 전력부가 효율 특성을 보였다.

Keywords

References

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