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DCM Frequency Control Algorithm for Multi-Phase DC-DC Boost Converters for Input Current Ripple Reduction

  • Joo, Dong-Myoung (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Kim, Dong-Hee (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Lee, Byoung-Kuk (Department of Electrical and Computer Engineering, Sungkyunkwan University)
  • Received : 2015.04.22
  • Accepted : 2015.07.08
  • Published : 2015.11.01

Abstract

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

Keywords

1. Introduction

Compared to the other types of renewable energy, fuel cells and photovoltaic generation systems are more suitable for distributed generation systems because of their several advantages such as lower environmental constraints and easy downsizing [1-3]. From the viewpoint of the load dependent voltage and slow dynamic characteristic of renewable energy, the power conditioning systems consist of converters and inverters to generate a stable output and for the proper output voltage level, boost converters are generally used for dc-dc converters.

A large input current ripple of the pulse width modulation (PWM) dc-dc converter is one of the obstacles to meet electromagnetic interference (EMI) requirements. Therefore, it is necessary to limit the input current ripple through proper equipment or a control method [4-8]. An additional hardware filter can be installed to limit the high-frequency input current ripple on the basis of the switching frequency. However, it has some drawbacks, such as power losses, cost, volume, and weight increase.

Several topologies without a filter have been proposed to reduce the input current ripple [4-8]. Reference [5] proposes double-Cúk with a coupled inductor, and it achieves a near-zero input current ripple. However, its double-stage configuration and the added passive components may decrease its efficiency and power density. The studies in [6-8] employ capacitors and inductors for ripple cancellation, and thus, these topologies also need additional components. Moreover, the operation mode of [7-8] is continuous conduction mode (CCM), which results in switching noise with steep dv/dt and di/dt due to the reverse recovery current of the diode [9].

The boost converter with CCM operation has the advantages of lower peak, ripple, and RMS inductor current. In general, the input current ripple is also lower than in the DCM operation. However, the problems posed by the reverse recovery current of the diode are critical. Fig. 1(a) shows that the voltage ringing and snappy spikes of the MOSFET which are synchronized at diode turn-off unlike in the DCM, as shown in Fig. 1(b). Fig. 2 shows how MOSFET voltage stress is affected by the reverse recovery current, which increases the MOSFET voltage rating and RDS(on) [10]. This voltage spike is generated by the parasitic source inductance Ls and the high di/dt current is expressed as

Fig. 1.Comparison of VDS for DCM and CCM control.

Fig. 2.Effect of reverse recovery current.

Although a parasitic source inductance is small, it can cause high-voltage ringing at the diode-off transition in the CCM owing to high di/dt [11].

The drawbacks of the CCM operation can be overcome by the DCM operation. The DCM multi-phase boost converter with interleaving control can be a strong candidate for reducing the input current ripple and eliminating the effects of the reverse recovery current [12-13]. However, the input current ripple is still higher than in the CCM operation under conventional variable duty and constant frequency control. Instead of duty control, the frequency would be controlled to regulate the output voltage in the DCM operation. Moreover, the input current ripple can be reduced at the optimum fixed duty by using frequency control.

In this paper, a fixed duty and variable frequency (FDVF) DCM control algorithm for the interleaved multi-phase boost converter is proposed to reduce the input current ripple without using additional devices. Moreover, the negative effect of diode reverse recovery is solved by using the characteristics of DCM. Unlike the conventional DCM PWM duty control method, the duty ratio of the proposed control algorithm is fixed, and the frequency is changed to regulate the output voltage by using the voltage gain characteristic of DCM control. A 600 W prototype hardware is designed to verify the proposed frequency control algorithm. Compared to conventional PWM control, the input current ripple is reduced on average by 32%, and its frequency varies from 11.3 to 37 kHz.

 

2. Proposed Frequency Control Algorithm for Input Current Reduction

2.1 Optimum duty selection for input current ripple minimization

The input current ripple of the CCM interleaved boost converter is shown in Fig. 3. The input current ripple is minimized by a duty of 360°/N owing to the ripple cancellation effect. This means the input current ripple components are cancelled by the equal magnitudes of the rising and falling slopes. The duty ratio Dk for minimizing the input current ripple can be expressed as follows:

Fig. 3.Input current ripple comparison of the CCM.

Similarly, the input current ripple is minimized at the same duty in the DCM. However, the duty ratio of the CCM boost converter is

where Vo and Vin are the output and input voltages, and Gv is the voltage gain.

This means the output voltage is a function of the duty ratio, and it is determined by only the input and output voltages. Hence, in CCM, it is impossible for the operation of the optimum duty according to (2) for minimizing the input current ripple at all times. On the other hand, the voltage gain of the DCM boost converter is [14]

where Ro is the output resistance, fsw is the switching frequency, and L is the boost inductance.

By controlling the switching frequency in the DCM operation instead of controlling the PWM duty ratio, the voltage gain of the boost converter can be regulated. Hence, the input current ripple current can be minimized by fixing the duty ratio at 1/N. Furthermore, the elimination of the negative effects of diode reverse recovery can be obtained.

2.2 Duty determination for DCM operation

The proposed frequency control is analyzed for the three-phase interleaved boost converter. The voltage gain of the boost converter in the DCM operation is given by (5). DA represents the proportion of the inductor current that falls to 0 in the switching period and is given by (6). The voltage gain Gv of the DCM is always higher than that of the CCM because DA is smaller than 1.

where Tsw,(on) and TD,(on) are the on times of the MOSFET and the diode, respectively.

Fig. 4 shows the voltage gain curve of the DCM and the CCM. The curve represents the voltage gain of the CCM, and the upper area of the curve is the available voltage gain of the DCM. When D is 1/3 or 2/3, the voltage gain is 3/2 or 3. Thus, the minimum voltage gain of the proposed control is above 3/2 in the three-phase case.

Fig. 4.DCM operation area and voltage gain.

If a voltage gain over 3 is required, theoretically, duties of both 1/3 and 2/3 can be selected; however, the calculated switching frequency will be too low. Therefore, a duty of 2/3 is suitable in this case. Similarly, the optimum duty for the voltage gain between 3/2 and 3 is 1/3. From (1), the expression for the general selection guide for the N-phase boost converter is given by (7). The visualized duty ratio selection guide of the proposed frequency for the three-phase and N-phase boost converter is shown in Fig. 5.

Fig. 5.Duty ratio according to voltage transfer ratio.

2.3 Variable switching frequency control algorithm

The switching frequency should be calculated to achieve the required step-up ratio after the duty ratio is determined. In terms of the switching frequency, rewriting (4) yields

Substituting Ro from (9) by using Ohm’s law:

where Io is the output current.

The duty ratio is predetermined in Section 2.2, and the inductance is a constant value according to the system design. The voltage gain expressed by (9) corresponds to an ideal case as the permeability variation of the inductor has been ignored. As shown in Fig. 6, in the practical design, the inductance will be changed by the amount of current applied. In order to quantify the roll-off, consider the variation in inductance as a function of the inductor current iL [15]:

Fig. 6.B-H curve of magnetic components.

where Lint is the initial inductance at I = 0 A.

The variation in the inductance increases the output voltage regulation error. Thus, the inductance roll-off should be compensated. One method to achieve this is to model the inductance as a function of iL into (10). However, this method cannot be applied for a common design owing to the need for inductor analysis and the nonlinear characteristics of permeability. The problem can be solved by using the conventional PI controller in addition to the proposed frequency controller. In the inductor design process, the permeability decrease ratio of the inductance is limited to approximately 20%. The maximum value of the duty ratio change is the reciprocal of the inductance change. Therefore, a PI controller can be applied to the proposed frequency algorithm without a significant duty change, and the output voltage can be regulated as follows voltage reference V*ref.

2.4 Controller modeling and design

The stability of proposed control algorithm should be verified according to the frequency variation range due to variable frequency and fixed duty characteristic. The current control loop model for the three-phase boost converter system is shown in Fig. 7. The three-phase interleaved boost converter is controlled by the average current mode control to obtain a fast response for the load and input voltage changes by sensing the output voltage and the inductor current. The controller design targets the lowest input voltage because from (10), the switching frequency is proportional to the input voltage.

Fig. 7.System control block diagram.

The designed frequency controller is shown in Fig. 8. The operating duty is selected from the ratio of Vo and the output voltage reference V*ref, and the frequency is determined from the designed inductance value and the sensed output current and voltage for real implementation. The frequency limiter limits too low or high switching frequencies to prevent saturation of the inductor core and too high a switching frequency under light load condition. The PI controller is employed to cope with inductance variation and the switching frequency limitation condition. The PI controller for current and voltage compensation is designed to ensure stable operation at variable frequency control on the basis of the stability analysis.

Fig. 8.Proposed frequency control DCM algorithm.

Fig. 9 shows the open loop and compensated frequency response of the inner loop. The R(s) is regulator transfer function, A(s) is open loop transfer function, and Cl(s) is closed loop transfer function. The phase difference of the current controller for each phase is 120°, and the gain is the same. The bandwidth of the inner current loop is set at 2.37 kHz considering the lowest switching frequency at 33 V input voltage. The PI controller is used as well for the outer voltage loop, as shown in Fig. 10. The bandwidth of the compensated outer voltage loop is 16 Hz, and the phase margin is 53°. Both outer and inner loops are designed through PSIM Smartctrl in the frequency domain. The stability of the compensated loops over the entire operating frequency range is confirmed via the gain and phase margin.

Fig. 9.Frequency response of compensated current

Fig. 10.Frequency response of compensated voltage

 

3. Verification of Proposed Algorithm

In order to verify the proposed control algorithm, simulation and experiments have been performed with a 600 W prototype with the system parameters shown in Table 1.

Table 1.System specification

3.1 Inductor design

For DCM operation, the inductance should be smaller than the boundary under the overall input voltage and switching frequency. The boundary inductance Lcrit is expressed as

where f (IL) is the inductance correction term considering the permeability variation. The variation of the nominal inductance is

After calculating the inductance value by the initial inductive factor AL0, the inductor current is estimated in the input voltage and the switching frequency in order to correct inductance decrease by the magnetizing force. Fig. 11 shows the boundary inductance value calculated by (11) for the switching frequency and the input voltage. Therefore, the inductance value should be designed under the lower part of the graph, and near the boundary condition 81 uH is selected to reduce the current ripple.

Fig. 11.Boundary inductance according to Fsw and Vin.

3.2 Simulation results of proposed algorithm

The comparison of the input current ripple is shown in Fig. 12. If the calculated frequency is 11 kHz or less, the input current ripple is higher than in the conventional DCM. Thus, a frequency limiter is employed to limit the input current ripple and prevent saturation of the inductor core.

Fig. 12.Current ripple comparison of each algorithm.

In the case of an input voltage less than 50 V, the calculated switching frequency from the proposed algorithm is lower than that from the conventional algorithm. In spite of the low switching frequency, the input current ripple is decreased owing to the ripple cancellation effect of the proposed control algorithm. The input current ripple is near zero at an input voltage of 45 V because of the symmetric D and DA of each phase. This means the slope of each phase current is a constant value, represented in Fig. 13. Fig. 14 shows the comparison of the MOSFET switching loss and inductor loss of each control algorithm. The diode loss is assumed to be the same because it is determined by the average current. For both control algorithms, the inductor loss is decreased in accordance with the input voltage increase due to the reduction in the inductor current ripple and the rms value. On the other hand, in the proposed frequency control algorithm, the switching loss is increased because of the rise in the switching frequency. Thus, the trend of the total loss is parabolic. Although the entire loss is higher above 50 V input voltage conditions, the difference in the losses of the algorithms is very slight in spite of the significant frequency difference.

Fig. 13.Input current ripple comparison at 45 Vin

Fig. 14.Loss analysis of each algorithm at 600 W

3.3 Experimental results of proposed algorithm

In order to validate the proposed control algorithm, experimental tests were carried out by using 600W hardware.

The special case of the proposed control algorithm is shown in Fig. 15. Although the switching frequency of the proposed algorithm is low, the input current ripple is near zero owing to the cancellation effect.

Fig. 15.Input current ripple of each algorithm at 600 W.

Fig. 16 shows the results of the simulation and experimental results of each algorithm according to the input voltage. The input current ripple of the proposed algorithm is less or equal at specific input voltage range. With the proposed algorithm, an average input current reduction of 57% is obtained.

Fig. 16.Results of input current ripple according to Vin.

Fig. 17 shows the efficiency of each algorithm, and the difference is a little low because the proposed algorithm is based on the characteristics of DCM, and it can easily obtain the high-efficiency results of zero current turn-on. From the simulation and experimental results, it is noted that the proposed DCM frequency control algorithm is able to obtain reduction of input current ripple in addition to high efficiency.

Fig. 17.System efficiency comparison of each algorithm.

 

4. Conclusion

This paper proposed a fixed duty and variable frequency control algorithm for the interleaved boost converter with the capability of input current ripple reduction. This is achieved without using additional components. In addition, the harmful effects of the diode reverse recovery current are eliminated by the DCM operation characteristic. The duty of the proposed algorithm is predetermined to minimize the input ripple current, and the output voltage is regulated by frequency control. The stability of the proposed algorithm is analyzed by Psim SmartCtrl 1.1

A 600 W three-phase boost converter prototype is designed to verify the proposed algorithm. An average ripple current is reduced 57% at 33 V–60 V input without an efficiency decrease. Moreover, the input current ripple is near zero at 45 V input in spite of the low switching frequency. These features can reduce the burden of power conversion system such as large input current and input filter.

References

  1. M. Rogol, S. Doi, and A. Wilkinson, “Sun screen: Investment opportunities in solar power,” Solar Power Sector Outlook, CLSA Asia-Pacific Markets, Jul. 2004.
  2. D. H. Kim, G. Y. Choi, B. K. Lee, “DCM Analysis and Inductance Design Method of Interleaved Boost Converters”, IEEE Trans Power Electron., vol. 28, no. 10, pp. 4700-4711, 2013. https://doi.org/10.1109/TPEL.2012.2236579
  3. G. Y. Choe, J. S. Kim, H. S. Kang and B. K. Lee, “An Optimal Design Methodology of an Interleaved Boost Converter for Fuel Cell Applications”, Journal of Electrical Engineering & Technology, vol. 5, no. 2, pp. 319-328, Jun., 2010. https://doi.org/10.5370/JEET.2010.5.2.319
  4. N.K. Poon, J.C.P. Liu, C.K. Tse, and M.H. Pong, “Techniques for input ripple current cancellation: classification and implementation”, IEEE Trans. Power Electron., vol. 15, no. 6, pp. 1144-1152, Nov. 2000. https://doi.org/10.1109/63.892829
  5. Birca-Galateanu, S., “Double DC-DC converters with low input current ripple”, IEEE 31st Power Electronics Specialists Conference, vol. 2, pp. 837-842, Galway, 2000.
  6. Wang, J., Dunford, W.G., Mauch, K., “Analysis of a ripple-free input-current boost converter with discontinuous conduction characteristics”, IEEE Trans. Power Electron., vol. 12, no. 4, pp. 684-694, Nov. 1997. https://doi.org/10.1109/63.602564
  7. Leu, C. -S., Nha, Q. T, “A half-bridge converter with input current ripple reduction for DC distribution systems”, IEEE Trans. Power Electron., vol. 28, no. 4, pp. 1756-1763, Apr. 2013. https://doi.org/10.1109/TPEL.2012.2213269
  8. Rosas-Caro, J.C., Mancilla-David, F., Mayo-Maldonado, J.C., Gonzalez-Lopez, J.M., Torres-Espinosa, H.L., Valdez-Resendiz, J.E., “A transformer-less high-gain boost converter with input current ripple cancelation at a selectable duty cycle”, IEEE Trans. Power Electron., vol. 60, no. 10, pp. 4492-4499, Nov. 2013.
  9. Heinz van der Broeck, Ibrahim Tezcan, “1 KW Dual Interleaved Boost Converter for Low Voltage Applications”, Power Electronics and Motion Control Conference (IPEMC), Aug., 2006.
  10. Texas instruments, "Ringing reduction techniques for NexFETTM high performance MOSFETs", TI Application Report, Nov. 2011.
  11. Wei Zhang, Xiucheng Huang, Fred C. Lee, Qiang Li, “Gate Drive Design Considerations for High Voltage Cascode GaN HEMT”, IEEE Pro. APEC'2014, pp. 1484-1489, Mar. 2014.
  12. D. K. Kwak, “A Study on Isolated DCM Converter for High Efficiency and High Power Factor”, Journal of Electrical Engineering & Technology, vol. 5, no. 3, pp. 477-483, Sep., 2010. https://doi.org/10.5370/JEET.2010.5.3.477
  13. D. H. Kim, G. Y. Choe, and B. K. Lee, “Design and Control of an Optimized Battery Charger for an xEV based on Photovoltaic Power Systems,” Journal of Electrical Engineering & Technology, vol. 9, no. 5, pp. 1602-1613, Sep. 2014. https://doi.org/10.5370/JEET.2014.9.5.1602
  14. Daniel W. Hart, “Introduction to power electronics”, Prentice Hall, 1997.
  15. ChangSung Corporation, “Magnetic Powder Cores”, Ver. 1.3, pp 43, 2013.