A Control Strategy Based on Small Signal Model for Three-Phase to Single-Phase Matrix Converters

Abstract

This paper presents a novel close-loop control scheme based on small signal modeling and weighted composite voltage feedback for a three-phase input and single-phase output Matrix Converter (3-1MC). A small non-polar capacitor is employed as the decoupling unit. The composite voltage weighted by the load voltage and the decoupling unit voltage is used as the feedback value for the voltage controller. Together with the current loop, the dual-loop control is implemented in the 3-1MC. In this paper, the weighted composite voltage expression is derived based on the sinusoidal pulse-width modulation (SPWM) strategy. The switch functions of the 3-1MC are deduced, and the average signal model and small signal model are built. Furthermore, the stability and dynamic performance of the 3-1MC are studied, and simulation and experiment studies are executed. The results show that the control method is effective and feasible. They also show that the design is reasonable and that the operating performance of the 3-1MC is good.

I. INTRODUCTION

The alternative part of the output power in a three-phase to single-phase Matrix Converter (3-1MC) causes input current distortions and power factor reductions, due to the direct coupling between the input and output [1]-[3]. Paper [4] proposed a modulation method where the power pulsation in the output side was absorbed by the inertia of the rotor. However, this method increased the mechanical loss of the motor and reduced the efficiency of the power generation system. In [5], most of the power pulsation was stored in the Z-source impedance network. However, some part of the power pulsation still impacted the input side.

A method where the active power decoupling unit is used to compensate the power pulsation has been shown to be more effective and feasible [6]-[9]. Makoto Saito proposed the concept of active power decoupling in 2004, where single-phase power pulsations were stored in an inductor by modulation of the power switches. To reduce the bulk of the decoupling unit, the large inductor was replaced by a capacitor, and a novel single-phase to three-phase MC topology was developed in [7]. Furthermore, [8] investigated the design principle of the decoupling capacitor. Then, a simple decoupling method in which a non-polar capacitor was used as a decoupling unit was introduced in [9], and the corresponding modulation strategy was discussed.

A 3-1MC, which is in parallel to the grid, was studied and designed as a constant-current source in [10]. The input current and output current of the converter were controlled independently. The reference value of the input current controller was calculated by the output power in the grid side, and the power loss is not taken into account. Meanwhile, the regulating algorithm was implemented according to the effective value. Consequently, its accuracy and dynamic performance were not good. This paper presents a novel control method where the composite voltage, which is weighted by its load voltage and decoupling unit voltage, is used as the feedback value. With its instantaneous output voltage control, the novel method makes the performance of the 3-1MC better.

Control system design based on the small signal model has not been studied a lot for 3-1MCs. Unlike 3-3MCs, in which the output voltage can be decomposed into d and q components and the small signal model can be established simply based on them, the modeling of 3-1MCs is much more difficult. Based on the ideas of [11] and [12], a solution is presented here where the small signal model of a 3-1MC is built based on the composite voltage. With this idea, the dual-loop controllers are designed, and the prototype is developed. A series of simulation and experimental studies are executed to verify its effectiveness and feasibility.

 

II. POWER DECOUPLING UNIT

A. Power Decoupling Principles

The topology and the equivalent circuit of a 3-1MC are illustrated in Fig. 1and Fig. 2. The virtual ac-dc side is a three-phase voltage source type rectifier (VSR). Assuming that the input instantaneous power is constant and that the input current and voltage are in-phase, the dc link presents the properties of a constant current source [13]. The input power of the converter is equal to the dc link power in ideal conditions. Therefore, the dc link voltage must be maintained as a constant.

Fig. 1.3-1MC with a power decoupling unit.

Fig. 2.Equivalent circuit of 3-1MC.

The virtual dc-ac side is a two-phase current source type inverter (CSI).SPWM is adopted in the load phase and in the active power decoupling phase. The modulation functions are assumed as:

According to the superposition theorem, the dc link voltage is the weighted sum of the load voltage and the decoupling capacitor voltage, i.e. the composite voltage ucomp satisfies:

In (1) and (2), are the modulation radios of the load phase and the decoupling phase, respectively, uo is the load voltage, uc is the decoupling capacitor voltage, ωo is the output angular velocity, φc is the initial phase angle of the decoupling modulation wave, φo is the load impedance angle, Uo is the effective value of the load voltage, idc is the dc link current, and Cc is the capacitance of the decoupling capacitor. When and φc satisfy formula (1-3)[14], pulsed voltage components of twice the output frequency are neutralized. Then, ucomp is maintained as a constant:

Therefore, the single-phase power pulsation is decoupled with a constant input power, and the instantaneous input power is kept at a constant value, which can be expressed as:

B.Design of the Power Decoupling Unit

The power pulsation is absorbed and released completely by the decoupling capacitor in a pulsed period. Energy stored in the capacitor is equal to the work of the power pulsation. Then, the relationship between the capacitance of Cc and its maximum voltage Ucmax can be expressed as[14]:

Where Po is the load power, and fo is the output frequency.

On the other hand, the converter usually works in the linear modulation range. Therefore, the sum of the load phase duty ratio dl and the decoupling phase duty ratio dc should be less than 1 in real time. Combining (1) with (3), the duty ratios:

By using the Cosine theorem, the amplitude of the sum of the duty ratios satisfies:

To improve the utilization rate of the power switches and the voltage transfer ratio, |d∑| should be designed to be as large as possible. |d∑| = 1 can be assumed here. Substitute (4) into (7). Then, the relationship between the dc link current and the capacitance of Cc is obtained as:

Taking Uo = 150V as an example, the relationships between Cc and Idc are presented in Fig. 3 for situations of different output powers and different output frequencies .The dc link current is increased when a larger capacitance is chosen and its value also grows with an increase of the power and frequency.

Fig. 3.Relation curves of capacitance and current stress.

Combined with the limitation of (5), in low power appliance like 500W,50Hz , if the capacitance of Cc is chosen between 20μF-30μF , the voltage stress and current stress are well balanced.

In relative high power application, the power pulsation can also be compensated by the decoupling capacitor in the same method, when the parameters of the modulation functions meet equation (3). Table I lists the design values of Cc at different output frequencies of the 5kW matrix converter. The maximum voltage of the decoupling capacitor is designed as about 400V.

TABLE ICAPACITANCE OF Cc IN 5KWMATRIX CONVERTER

 

III. MODULATION OF THE 3-1 MC

After increasing the power decoupling unit, a modulation method that synthesizes the modulation of the VSR and the CSI is adopted for the 3-1 MC.

A. SVPWM Modulation for VSR

For the VSR, SVPWM is applied [15], [16]. Fig. 4 shows the voltage space of the VSR input side. It is divided into six sectors by six basic vectors, and the amplitude of each basic vector is 2ucomp/3 .In order to implement the unit power factor, the three-phase input voltages need to be symmetrical sinusoidal voltages.

Fig. 4.Voltage vector diagram of MC input side.

Namely the space vector rotates at a constant speed in the αβ static coordinate system. Therefore, the rotation vector in each sector can be composited by the adjacent basic vectors, and the trajectory of its endpoint is an approximate voltage cycle.

According to the voltage vector synthesis relationship and the sine theorem [17], the operating times Ti1 and Ti2 of the basic vectors Ui1 and Ui2 in each sector can be obtained in Table II. Ti0 is the operating time of the zero vector which can be calculated as: Ti0 = Ts - Ti1 - Ti2.

TABLE IIOPERATING TIME OF VECTORS IN EACH SECTOR

By detecting the sector signal of the vector , the operating voltage vectors in each sector and their operating times are determined. Then, the VSR is modulated to make the virtual dc link perform as a current source.

B. Staggered Modulation for CSI

For the CSI, when the load phase and decoupling phase work together, simultaneous conduction of the same pole side switches ( Sps , Spr ) and ( Sns , Snr ) must be avoided. Otherwise two capacitors with different voltages connect in parallel, and the short circuit current will breakdown the power switches (as shown in Fig. 5). Thus, staggered modulation is carried out for the CSI.

Fig. 5.Short circuit fault.

SPWM is adopted for both phases and their modulation functions are given by (1). In order to implement staggered modulation, the duty ratios of the load phase and decoupling phase should be reasonably allocated to assure that the conducting time of the bridge arms( Spr, Snr )and( Sps, Sns ) do not overlap.

Where Ui1 lag Ui2 , Ts is PWM period , urα , urβ are the value of in αβ static coordinate system.

Therefore, the carrier contains a couple of opposite triangular waves. The bridge arm ( Spr, Snr ) is modulated by the decreasing-count triangle wave, while the bridge arm ( Sps, Sns) is modulated by the increasing-count triangle wave. Then, the operating time of the two phases is allotted from two ends of a PWM period, as shown in Fig. 6.

Fig. 6.Staggered modulation for CSI.

In addition, the sum of the duty ratios of the two phases should be less than 1.The amplitude of the sum of the duty ratios |d∑| meets equation (7):

The modulation ratio is a constant. Therefore, |d∑| has a positive correlation relationship with Cc when the load Zo remains unchanged. Only when Cc is less than the limit value given by (8), can the requirement of |d∑| ≤ 1can be guaranteed. In this case, the zero current state is always existent. Table III shows the time distribution in a PWM period for the CSI.

TABLE IIITIME DISTRIBUTION FOR CSI

As for the current type inverter, when only the load phase operates, the CSI’s input voltage component is fluo :

There is a low frequency pulsed component. If this pulsed component directly reflects the input side, it will cause input current distortion.

When only the decoupling phase operates, the CSI’s input voltage component fcuc happens to be a pulsed component of twice the output frequency.

However, actual operation of the CSI should combine the load phase and the decoupling phase, so that the input voltage of the CSI is a composite voltage ucomp .When the modulation function satisfies (3), ucomp is simplified as:

In (11), the low frequency pulsed component is eliminated and the composite voltage maintains constant.

Using the described modulation method, the current and voltage vector diagram of the CSI output side is obtained as shown in Fig. 7. The current space is divided into 4 sectors according to the direction of the current. The γ axis and ψ axis are perpendicular to the load phase current vector and the decoupling phase current vector, respectively. The ψ axis lags the γ axis by φc. Combined with the VSR voltage space vector diagram, a 3-1MC with active power decoupling capacitor has a total of 6×4=24 kinds of sector combinations.

Fig. 7.Output current and voltage vectors of CSI.

C. Switch Modes of the MC

After modulation synthesis, the operating time of each sector is reduced. When the operating vector of the VSR is Ui1 , the conduction time of the load phase and decoupling phase are expressed as:

When the operating vector of the VSR turns into Ui2 ,the conduction time of the two phases change as:

Therefore, the operating time of the zero vector can be calculated:

Combining Table II and formula (6), 5 slices of the time signal of the 3-1 MC in all of the sectors are obtained.

To investigate working states of the 3-1 MC in different sectors, it is assumed that the input frequency is 50Hz and that the output frequency is 400Hz. Then, each voltage sector contains all of the current sectors. Table IV shows the power switch state of the 3-1 MC.

TABLE IVSWITCH STATES IN DIFFERENT KIND OF SECTOR COMBINATIONS

The 3-1MC has 5 kinds of switch modes in every sector combination. Take the VI—Z4 sector as an example to analyze the switch modes under the 5 time-slice signals (as illustrated in Fig. 8). Suppose time variables:

Fig. 8.Switching modes of 3-1MC in a PWM period.

In mode (a), the inductor current of phase A and phase C discharge the load phase, while the decoupling capacitor energy remains unchanged. In mode (b), the inductors discharge the decoupling phase, whose charge current is the sum of the inductor currents of phase A and phase C, and filter capacitor discharges the load. In mode (c), the inductor current turns to discharge the load phase, but the charge current is the inductor current of phase A. In mode (d), the inductor current of phase A discharges the decoupling phase and the filter capacitor discharges the load. Mode (e) is the working state of the zero vector, in which the three phase inductors store energy.

As can be seen from the 5 kinds of switch modes, the current of the two phases with the largest amplitude charge the load and the power decoupling capacitor. This conforms to the law of voltage space vector modulation. The working state of the inductors and capacitors in the other sector combinations can be analyzed in the same way.

 

IV. MODELING OF THE 3-1MC

A set of power switches and a decoupling capacitor are introduced into a 3-1MC, which increases the time-varying and nonlinear factors in the 3-1 MC mathematical model. In order to investigate the closed-loop control strategy, the average signal model of the 3-1MC is built in the dq coordinate system. Then, disturbances are separated to obtain a small signal model with the feed-forward decoupling control.

A. Average Signal Model

Combined with the equivalent circuit of the 3-1 MC power decoupling topology, the mathematical model of the VSR is derived by using the switch average model:

Where S* = (Sa + Sb + Sc) / 3 and Si(i = a,b,c)are switching functions.

KCL is applied for the CSI, and then the mathematical model can be expressed as:

Using formula (2), the state equation of the 3-1 MC power decoupling topology in static coordinates is deduced:

In the static coordinates system, the average signal model of the 3-1MC is very intuitive and each variable has a clear physical meaning. However, the input current and voltage are ac variables, which is not conducive to control system designing and causes steady-state errors [18]. Therefore, the equivalent transformation matrix of the rotating coordinate system is employed:

Assuming that the three-phase input power is symmetrical, i.e. ia + ib + ic = 0 , ua + ub + uc = 0 , the state equation of the 3-1 MC power decoupling topology in the rotating coordinate system is derived as:

Where ωi is the input angular velocity, dd,dq, id,iq and ud,uq are the switching functions, input current and voltage in rotating coordinate system.

According to state equation (15), the average signal model of the 3-1MC in the dq coordinate system is illustrated in Fig. 9. To eliminate the time-varying factors caused by switches, the nonlinear switching elements are replaced by controlled sources which use the average components as control variables.

Fig. 9.Average signal model of 3-1MC.

The voltage controlled sources of the input side:

The current controlled sources of the output side:

Although the ac variables of the 3-1MC input side are turned into average dc components in the dq coordinate system, uo and uc in the output side are still ac variables. Therefore, it is necessary to use the composite voltage ucomp to express uo and uc , and to separate the disturbances to obtain a linearized small signal model.

B. Small Signal Model

In order to eliminate time-varying variables, the disturbances of the references and high order small signal components are ignored, while only the disturbances from the input source and load are considered. The average signal variables in the average signal model are assumed as:

, x = {id, iq, dd, dq, ud, uq, ucomp, idc, uo, uc}. Insert x into (2). Then:

The small signal components of the load voltage and decoupling capacitor voltage are:

Combined with (16)-(18), the small signal component of the weighted composite voltage ũcomp is obtained as:

Formula (19) shows the linear relationship between ũcomp and . The weighted composite voltage indirectly reflects the load voltage and decoupling capacitor voltage. As a result, ũcomp can be substituted for the ac variables uo and uc in the state equation of the 3-1 MC. Then, all of the ac components in the model are eliminated.

In the average signal model, the input d axis current and the q axis current are coupling. Thus, feed-forward decoupling control is employed to make the control circuits of the d axis and q axis mutually independent. According to the relationship between the input power references and the current references as Equation (20), the input unity power factor can be achieved if the reactive current reference is set to 0.

After the feed-forward decoupling control, all of the small signal components in (15) are separated. The differential equations of the d and q axis are deduced as follows:

Based on differential equations, the small signal circuit model of the 3-1MC with feed-forward decoupling control is built in Fig.10, where:

Fig. 10.Small signal circuit model of 3-1MC with feed-forward decoupling control.

The small signal circuit model is very simple and clear. The input sides of the model are two independent Boost type switch networks in parallel. This greatly simplifies the time-varying, complex mathematical model of the 3-1MC. In addition, regulation without steady-state errors can be achieved. This contributes to the research and design of the closed-loop system.

 

V. CLOSED-LOOP CONTROL AND CONTROLLER DESIGN

A. Dual-Loop Control System

In the dq coordinate system, the d axis current and q axis current control the active component and reactive component of the input current independently. However, the reference of the d axis current is a dc signal, so the control variable for the voltage loop should also be a dc signal.

The weighted composite voltage can be expressed as:

This is proportional to the load voltage RMS value, and the ratio is kept constant. Thus, it can be taken as the control variable for the voltage loop.

According to the small signal circuit model and (16)-(19), the small signal component of the weighted composite voltage ũcomp is composited by the small signal components of the load voltage and decoupling capacitor voltage. It also has a linear relationship with the small signal of the dc link current. As for the current source inverter, the dc link current determines the load voltage and decoupling capacitor voltage.

In addition, the weighted composite voltage can be calculated by sampling the instantaneous values of the load voltage and decoupling unit voltage. The integral computation for calculating the voltage RMS value is no longer necessary.

Therefore, taking the weighted composite voltage as the feedback quantity can indirectly control the load voltage and decoupling capacitor voltage. In addition, its characteristic of rapid calculation will improve the dynamic response speed of the control system.

According to (21), the input current feed-forward decoupling control is employed. Then, the d axis current and q axis current are used to adjust the three-phase active and reactive power. Through the feedback of the weighted composite voltage, the voltage-loop control quantities are dc variables. Therefore, the pi regulation has no steady-state error and the control system design is simplified. Finally, a novel dual-loop control strategy with the weighted composite voltage feedback is proposed. The complete closed-loop control system of the 3-1 MC power decoupling topology is illustrated in Fig. 11.

Fig. 11.Control system of 3-1MC based on the weighted composite voltage feedback.

B. Controller Design

In the dual-loop control, the outer voltage loop varies much slower than the inner current loop. As a result, it is assumed that to design the current loop controller.

To keep the system symmetric, the d and q axis current control should be the same. Taking the d axis control block diagram as an example (shown in Fig. 12), the following presents the analysis and design of the current-loop control parameters.

Fig. 12.axis current loop control.

Where is the inertia link of the virtual rectifier, is the inertia link of the control-to-current transfer function, is the delay of the current sampling feedback channel, and kip + kii/s the PI controller of the current loop.

Two little-time inertial links are equivalent to one inertial link. The zero and pole of the large time constant offset each other to improve the regulation speed. Then, its closed-loop transfer function is derived as:

Where Tis = 0.5Ts + nTs .Then, the scale parameter and the integral parameter are obtained:

In this paper, the inductance and parasitic resistance of the ac inductors are Lre = 2mH, Rre = 0.1Ω, the PWM frequency is fs = 10kHz , and the damping ratio ξ is usually 0.707. Then, the scale parameter and the integral parameter are calculated: kip = 0.47, kii = 23.5

The further design for the voltage loop control block diagram is shown in Fig. 13. 1/(1 + Tucs) is the delay of the voltage sampling feedback channel, transfer function, Kpwm/(1 + Tis) is the simplified closed-loop transfer function of the current loop, Ti = Lre/kip ,and kpv + kiv/s is the outer loop PI controller.

Fig. 13.Outer voltage loop control.

The order is reduced by merging little-time inertial links in the same way, and the open-loop transfer function is obtained as follow:

Where Tvs = Ti + Tuc. According to (25), the amplitude frequency characteristics and phase frequency characteristic curves of the outer voltage loop transfer function are given in Fig. 14. The transfer function is specially designed so that the zero is between two poles, i.e. the outer loop PI parameters satisfy the formula:

Fig. 14.Bode diagram of voltage open loop transfer function of 3-1MC.

The filter capacitor Cf = 4.4 μF , and the load resistance RL = 50Ω-150Ω .By combining (26) with Fig. 14, the outer voltage loop PI parameters are designed as kvp = 0.1,kvi = 60 . Then, the phase angle margin γ = 45°-70° . As a result, the overshoot and adjusting time of the control system can be well balanced.

 

VI. SIMULATION OF THE CLOSED LOOP SYSTEM

To verify the effectiveness of the presented dual-loop control scheme, simulations of the dynamic process are performed for a 3-1MC with the decoupling unit in Matlab Simulink. The major parameters of the numerical simulation are given as:

Where Ulin is the effective value of the line voltage in the three-phase side, and fin is the input frequency.

Consider that disturbances are mainly from the source and load in actual operation. The following part analyzes the dynamic regulation features of the 3-1MC in both disturbance cases.

Load disturbances include sudden load increases and decreases. Simulation waveforms of the input current and voltage, the output load voltage and the decoupling voltage are illustrated in Fig. 15(a) when the load suddenly increases. Since the load resistance decreases from RL = 100Ω to RL = 50Ω, the input current increases twice to maintain the power balance. The load current jumps one time, and consequently the power pulsation absorbed by the decoupling capacitor jumps one time. Then, the maximum voltage of the decoupling capacitor jumps times, increasing from 226V to 320V. When the load changes, the output voltage presents a little distortion due to a delay of the closed-loop controllers. As a result, the voltage has a tiny drop. However, it soon settles down to 150V and its THD remains at 4.5%.In the process of adjustment, the input current and decoupling capacitor voltage both transit to the steady state rapidly and smoothly. The input current is still keep in phase with the input voltage and its THD is only 2.7%.

Fig. 15.Simulation waveforms in load disturbance.

Simulation results when load suddenly decreases are illustrated in Fig. 15(b). When the load resistance increases from RL = 50Ω to RL = 100Ω, the regulating process of the input current and decoupling capacitor voltage is exactly opposite to the load increase. Due to the increase of the load resistance and the delay of the closed-loop controllers, the output voltage has an overshoot. However, it soon returns to the 150V steady state. The THD of the output voltage and input current are 3.7% and 3.2%.

The input voltages may sharply increase or decrease. Fig. 16(a) shows the simulation waveforms of the 3-1MC when the input voltage suddenly decreases by 36%. The input current continuously increases to keep the power balance. The output voltage has a little distortion in the changing moment. However, it returns to the steady state in a cycle. The output impedance remains unchanged. Therefore, the output power and the power pulsation are the same, and the decoupling capacitor voltage basically remains invariant.

Fig. 16.Simulation waveforms in input voltage disturbance.

Fig. 16(b) shows the simulation waveforms of the 3-1MC when the input voltage suddenly increases by 36%. Regulating the process of the input current is opposite to the input voltage increase. The maximum voltage of the decoupling capacitor voltage remains the same in the changing moment. The output voltage has a slight distortion. However, it quickly regains stability.

It is seen from the above simulation analysis that whether the disturbance is from the load or input source, the closed-loop control system can effectively control the 3-1MC and adjust the input current and output voltage to the steady state in a cycle. In addition, the steady-state output voltage is not affected by disturbances. These results demonstrate that the proposed control scheme performs well at regulating properties. In addition, the changed power pulsation is absorbed completely by the decoupling capacitor throughout the experiment. This proves that the 3-1MC system can implement power decoupling in the closed-loop regulating process.

 

VII. EXPERIMENT VERIFICATION

The proposed control strategy and the design of the controllers are verified on a 500W prototype of a 3-1 MC with a power decoupling unit, as shown in Fig. 17. The prototype takes a TMS320F28335+CPLD as the core controller. Four-step communication is employed for safe communication.

Fig. 17.3-1MC prototype.

The hardware circuit is developed with the same parameters as those in the simulations.

A dynamic experimental study is carried out in four aspects: sudden load increase, sudden load decrease, sudden input voltage increase, sudden input voltage decrease. This is done to analyze the regulating capacity and response speed of the 3-1 MC with a power decoupling unit.

In Fig. 18(a), since the load resistance suddenly drops from RL = 100Ω to RL = 50Ω, it takes 2 cycles for the input current ia to reach the steady state. The current RMS value increases from 3.89 A to 7.5 A, the input current and voltage are still in phase, and the PF value is between 0.996 ~ 0.998. Due to the sudden load increase, the output voltage uo has a slight drop in the changing moment. However, it also returns to 150V in 2 cycles. The input current THD is 3.3% and the output voltage THD is 4.7%. The larger load current leads to a larger power pulsation. Thus, the energy stored in decoupling capacitor is greater and the maximum voltage of the capacitor is increased from 225V to 319V.

Fig. 18.Experiment waveforms of load disturbance.

Fig. 18(b) shows the experimental waveforms of ia, uo, and ucc when the load resistance suddenly increases from RL = 50Ω to RL = 100Ω. ia,uo, and uc return to the steady state in one cycle after the changing moment. At the beginning of the load decreasing, uo has an overshoot of σ% 12% ~ 15% , while the steady output voltage is still 150V. ia and uc both transit to the steady state smoothly. The adjusting process is exactly the opposite case of the load current sudden increase. After the dynamic process, the THDs of the output voltage and input current remain at 4.0% and 4.1%, respectively.

The experimental waveforms when the input voltage suddenly increases by 33% and decreases by 33% are shown in Fig. 19(a)-(b).When keeping 100 RL = 100Ω to uo = 150V , the input current decreases to 75% and increases to 150% compared with the original value. After the input voltage suddenly changes, ia is slightly distorted. However, it restores stability in a half cycle.

Fig. 19.Experiment waves of input voltage disturbance.

Load voltage uo has a little distortion due to the effect of the ia distortion. However, it reaches the steady state quickly. In addition, the THD of uo is below 5% in the re-steady state. As the power pulsation stays unchanged, uc is almost not affected by input voltage disturbances, which is consistent with the simulation results.

The experiment indicates that when a load disturbance or input voltage disturbance occurs, the closed-loop control system has a good dynamic regulating capability and a high response speed. Control objects such as the input current, output voltage, and decoupling capacitor voltage are adjusted to the steady state in one half to two cycles after the disturbance occurs. In addition, the PF value of the input current is close to 1 and the output voltage THD<5% in the re-steady state. These results confirm that the proposed control strategy is feasible for the 3-1MC with a power decoupling capacitor.

 

VIII. CONCLUSION

Based on an analysis of the relationship between the 3-1MC output load voltage and the decoupling capacitor voltage, this article proposes a novel control strategy that takes the output weighted composite voltage as the outer loop control variable, and realizes the output weighted control of the 3-1MC. Then, using the d and q axis current with feed-forward decoupling control as the current loop control variable, it obtains a unity power factor and a sinusoidal input current. The effectiveness of this strategy has been verified through experiment.

The transfer function expressions and controller design method are deduced through developing and studying the small signal model of a 3-1MC. By using this method to design a 3-1MC closed-loop control system, the control objects such as the input current and output voltage can be adjusted to the steady state in one half to two cycles after disturbances occur. This demonstrates the rapid dynamic response and the strong stability of the system.

Simulation and experimental results confirm that the closed-loop design method based on the proposed strategy is feasible. The system effectively accomplishes power decoupling with a high quality input current and a sinusoidal output voltage. It also demonstrates a fast dynamic adjustment ability.