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Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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The Analysis of the Breakdown Voltage according to the Change of JTE Structures and Design Parameters of 4H-SiC Devices

4H-SiC 소자의 JTE 구조 및 설계 조건 변화에 따른 항복전압 분석

  • Koo, Yoon-Mo (Dept. of Electronics Engineering, Sogang University) ;
  • Cho, Doo-Hyung (Dept. of Electronics Engineering, Sogang University) ;
  • Kim, Kwang-Soo (Dept. of Electronics Engineering, Sogang University)
  • Received : 2015.10.08
  • Accepted : 2015.11.23
  • Published : 2015.12.31
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Abstract

Silicon Carbide(SiC) has large advantage in high temperature and high voltage applications because of its high thermal conductivity and large band gap energy. When using SiC to design power semiconductor devices, edge termination techniques have to be adjusted for its maximum breakdown voltage characteristics. Many edge termination techniques have been proposed, and the most appropriate technique for SiC device is Junction Termination Extension(JTE). In this paper, the change of breakdown voltage efficiency ratio according to the change of doping concentration and passivation oxide charge of each JTE techniques is demonstrated. As a result, the maximum breakdown voltage ratio of Single Zone JTE(SZ-JTE), Double Zone JTE(DZ-JTE), Multiple Floating Zone JTE(MFZ-JTE), and Space Modulated JTE(SM-JTE) is 98.24%, 99.02%, 98.98%, 99.22% each. MFZ-JTE has the smallest and SZ-JTE has the largest sensitivity of breakdown voltage ratios according to the change of JTE doping concentration. Additionally the degradation of breakdown voltage due to the passivation oxide charge is analyzed, and the sensitivity is largest in SZ-JTE and smallest in MFZ-JTE, too. In this paper, DZ-JTE and SM-JTE is the best efficiency JTE techniques than MFZ-JTE which needs large doping concentration in short JTE width.

Silicon Carbide(SiC)는 높은 열전도도와 넓은 밴드갭 에너지로 인해 고온과 고전압 소자로 사용하는데 큰 장점을 가지고 있는 물질이다. SiC를 이용하여 전력반도체소자를 제작할 경우, 소자가 목표 전압을 충분히 견딜 수 있도록 Edge Termination 기법을 적용하여야한다. Edge Termination 기법에는 여러 가지 방안이 제안되어왔는데, SiC 소자에 가장 적합한 기법은 Junction Termination Extension (JTE)이다. 본 논문에서는 각 JTE 구조별 도핑 농도와 Passivation Oxide Charge 변화에 따른 항복전압의 변화를 살펴보았다. 결과적으로 Single Zone JTE (SZ-JTE)는 1D 시뮬레이션 값의 98.24%, Double Zone JTE (DZ-JTE)는 99.02%, Multiple-Floating-Zone JTE (MFZ-JTE)는 98.98%, Space-Modulated JTE (SM-JTE)는 99.22%의 최대 항복전압을 나타내었고, JTE 도핑 농도 변화에 따른 최대 항복전압의 민감도는 MFZ-JTE가 가장 낮은 반면 SZ-JTE가 가장 높았다. 또한 Passivation Oxide 층의 전하로 인해 소자의 항복전압의 변화를 살펴보았는데, 이에 대한 민감도 역시 MFZ-JTE가 가장 낮았으며 SZ-JTE가 가장 높았다. 결과적으로 본 논문에서는, 짧은 JTE 길이에서 높은 도핑 농도를 필요로 하는 MFZ-JTE보다 DZ-JTE와 SM-JTE가 실제 소자 설계에 있어 가장 효과적인 JTE 기법으로 분석되었다.

Keywords

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