Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Analysis of Reliability for Different Device Type in 65 nm CMOS Technology

65 nm CMOS 기술에서 소자 종류에 따른 신뢰성 특성 분석

  • Kim, Chang Su (Department of Electronic Engineering, Chungnam University) ;
  • Kwon, Sung-Kyu (Department of Electronic Engineering, Chungnam University) ;
  • Yu, Jae-Nam (Department of Electronic Engineering, Chungnam University) ;
  • Oh, Sun-Ho (Department of Electronic Engineering, Chungnam University) ;
  • Jang, Seong-Yong (Department of Electronic Engineering, Chungnam University) ;
  • Lee, Hi-Deok (Department of Electronic Engineering, Chungnam University)
  • 김창수 (충남대학교 전자전파정보통신공학과) ;
  • 권성규 (충남대학교 전자전파정보통신공학과) ;
  • 유재남 (충남대학교 전자전파정보통신공학과) ;
  • 오선호 (충남대학교 전자전파정보통신공학과) ;
  • 장성용 (충남대학교 전자전파정보통신공학과) ;
  • 이희덕 (충남대학교 전자전파정보통신공학과)
  • Received : 2014.11.06
  • Accepted : 2014.11.21
  • Published : 2014.12.01
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Abstract

In this paper, we investigated the hot carrier reliability of two kinds of device with low threshold voltage (LVT) and regular threshold voltage (RVT) in 65 nm CMOS technology. Contrary to the previous report that devices beyond $0.18{\mu}m$ CMOS technology is dominated by channel hot carrier(CHC) stress rather than drain avalanche hot carrier(DAHC) stress, both of LVT and RVT devices showed that their degradation is dominated by DAHC stress. It is also shown that in case of LVT devices, contribution of interface trap generation to the device degradation is greater under DAHC stress than CHC stress, while there is little difference for RVT devices.

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References

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