한국전자통신학회논문지 (The Journal of the Korea institute of electronic communication sciences)

한국전자통신학회 (Korea Institute of Electronic Communication Science)
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낮은 에러 플로어(error floor)를 사용한 효과적인 LDPC 복호 알고리듬

An Effective Decoding Algorithm of LDPC Codes with Lowering Error Floors

  • 왕석신 (전남대학교 정보통신공학과) ;
  • 서희종 (전남대학교 정보통신공학과)
  • 투고 : 2014.08.25
  • 심사 : 2014.10.17
  • 발행 : 2014.10.31
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초록

본 논문에서는, LDPC 코드의 성능을 향상시키기 위해서, LDPC 코드의 에러 플로어(error floors)를 낮추어서 복호를 수행하는 효율 좋은 알고리듬을 제안한다. 이 방법은, 바람직하지 않은 구조 때문인데, Tanner 그래프의 트래핑 세트를 줄여서 복호를 하는 방법이다. 이 알고리듬은 트래핑 세트를 줄이는 방법으로 복호의 효율성을 얻는다. 모의시험을 통해서 이 알고리듬의 개선된 성능을 확인 할 수 있었다.

In this paper, in order to improve performance of LDPC codes, we propose an effective algorithm with lowering error floor of LDPC codes. This method is done by breaking trapping sets, mostly caused by an undesirable structure. This algorithm is not need to observe all the errors, only need to break the trapping sets, to effect the effectiveness. Simulation results show that its performance can be significantly improved with this decoding algorithm.

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참고문헌

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