I. INTRODUCTION
In order to obtain high power factor transmission of electric power and reduced switching loss simultaneously, soft-switching PWM converters have become an effective solution among modern power conversion devices for suppressing harmonic pollution, restraining electromagnetic interference and increasing efficiency.
There are a variety of topologies and control strategies for designing three phase soft switching PWM converters. Among these, the zero-voltage switching (ZVS) converters can be broadly divided into two categories according to the different bus links in achieving resonance: the resonant DC link system (RDCLS) [1]-[3] and the resonant pole system (RPS) [4]-[10]. The RDCLS uses a resonant circuit composing of resonant inductors paralleled on the DC bus and snubber capacitors paralleled on the power switches, which achieves a periodical zero voltage on the DC bus as a basis for the power switches turning-on. This solution is simple in structure. However, it affects utilization of the bus voltage. In comparison the RPS changes the resonant circuit being with resonant inductors paralleled in three-phase bridges on AC bus links, which scales the bridge input voltage either at zero or at bus working voltage periodically, and so the power switches acts at zero voltage.
The auxiliary resonant commutated pole (ARCP) converters among the RPS solutions have some advantages, such as higher efficiency, lower voltage or current stress to the power switches and fly-wheel diodes. However, for the conventional ARCP three-phase PWM converter, each bridge with one resonant circuit has six auxiliary switches, three resonant inductors and six diodes, which lead to a complex structure. Some papers suggests a simplification of the structure of RPS converters so as to promoting their application [11]-[17].
A simplified ARCP for three-phase PWM rectifier is proposed in this paper, which includes two auxiliary switches, one resonant inductor and six diodes. Based on amplitude and phase control, the rectifier applies the least switching times PWM mode, which ensures a normal resonance to simplify the control, and improved efficiency. The six power switches in the three-phase bridges act under the ZVS state, while the two auxiliary switches work under the zero current switching (ZCS) state. The effectiveness of the proposed strategy is demonstrated through simulation and experiment results for a 1kW PWM rectifier.
II. MAIN CIRCUIT AND PWM CONTROL STRATEGY
Fig. 1 shows the main circuit of the proposed ARCP three-phase PWM rectifier, where eR, eS and eT refer to the three-phase AC source. The three-phase bridge circuit includes series inductances LR, LS and LT, power switches V1~V6, fly-wheel diodes VD1~VD6, and snubber capacitors C1~C6. The resonance circuit is composed of diodes VDA1~VDA3 and VDB1~VDB3, auxiliary switches VA and VB, split-capacitor capacitors Cd1 and Cd2, and a resonant inductor Lr. The DC voltage on the load is defined as Ed and Ed/2 as the voltage on Cd1 and Cd2 respectively. The fundamental components of the phase voltage after PWM are uR, uS and uT. The PWM control strategies of the rectifier are described in detail hereafter.
Fig. 1.Main circuit of the ARCP rectifier.
The rectifier applies amplitude and phase control to achieve power factor correction while the phase voltage and phase current are kept in phase. This complies with the following expressions:
Where M is the modulation ratio, and θ0 is the offset angle between uR and eR.
Fig. 2 shows the key waveforms, where iR, iS and iT are the three-phase currents from the source, and uR’, uS’ and uT’ are the three-phase modulation waves. On the other hand, uG1~uG6, uGA and uGB are the gate drive signals of the power switches V1~V6, VA and VB. It can be seen from Fig.1 that each power switch in the three-phase bridges has one paralleled snubber capacitor that prevents immediate voltage changes. The switches always turn off in the ZVS state. Therefore, only turning-on of the power devices in the ZVS state is necessary. To conveniently achieve closing of the switches at the same time, in Fig.2 the modulation method adopts a saw-tooth carrier with alternative positive and negative slopes instead of the conventional triangular carrier. It is defined here that when it flows to the power device, the phase current is positive and the saw-tooth carrier adopts a positive slope, or phase current is negative and the saw-tooth carrier adopts a negative slope. The turning-on of the power devices can be converged at the vertical edges of the saw-tooth carrier. When compared with the triangular carrier, the resonance control becomes easier and is reduces 1/3 resonant times.
Fig. 2.Key waveforms of proposed converter.
The minimum switching time PWM mode is adopted to ensure auxiliary resonant converting. In Fig.2 the per cycle of [0, 2] can be divided into six sections according to the difference between a phase current direction to the other two phase currents. For instance in section 2, since the phase R current is at maximum, it flows though diode VD1 in parallel with switch V1. Then in the phase R bridge, the two power switches V1 and V4 are kept off. Therefore, the switching times can be cut down 1/3 when compared to the conventional methods. The control strategy achieves easier control of the system.
Three phase voltage modulation wave signals uR’, uS’ and uT’ are generated by the line voltage. According to the six sections mentioned above and by combining equation (1), the following expressions can be derived:
Section 1
Section 2
Section 3
Section 4
Section 5
Section 6
From the above analysis, by comparing the modulation wave to the saw-tooth carrier, the gate drive signals uG1~uG6 are obtained for each power switch in all of the bridges. This is shown in Fig. 2.
III. RESONANCE MODE
In Fig. 2, when one phase current is negative while the other two are positive, the power switch VA is working and resonance happens. Conversely, if one phase current is positive while the other two are negative, VB is working. Since the respective phases’ currents are direct opposite, the ARCP circuit also has two operation modes, one of which is described in detail below.
Take section 1 as an example, when the three phase current directs as iS>0, iR>0, and iT<0, the power switches V2 and V5 in the T phase bridge are off, V1 and V2 in the R and S phases upper bridge are off, while V4 and V6 in the lower bridge and the auxiliary switch VA are on.
Fig. 3 shows the waveforms of the ARCP circuit. In per cycle of the carrier, 9 modes can be separated by the main circuit switching manners, which are shown in Fig. 4. Since the frequency of the rectifier carrier is much higher than the grid frequency, the input current in per cycle can be considered constant, and is represented by the constant current source is. Meanwhile, since the split-capacitors Cd1 and Cd2 are large enough, their voltages are considered constant, and it represented by the voltage source Ed/2.
Fig. 3.Waveforms of the ARCP circuit.
Fig. 4.Operating modes.
A. Resonance Analysis
Mode a (t0~t1): At the stable state, power is provided to the load from the three phase source and series inductors LR, LS and LT. Each phase current flows through the fly-wheel diodes VD2, VD3 and VD5 respectively.
Mode b (t1~t2): When VA switches on at t2, the voltage on Lr is Ed/2, and the current iLr increases gradually so that VA is switched on under zero current. When iLr=iDA1+iDA3≥iR+iT(=|iS|), diodes VD1 and VD3 are shut off at the zero current state.
Mode c (t2~t3): Resonance happens on both Lr and the snubber capacitors of R and T phases. For R phase, C1 is charging and C4 discharging, while for T phase, C3 is charging and C6 discharging. During the weakening of the discharge, iLr increases and then decreases until the discharging of C4 and C6 finish at a time when the phase voltage equals zero.
Mode d (t3~t4): At t=t3, uRN and uTN decrease to zero, and iLr=|iS|. Therefore, V4 and V6 are switched on under zero voltage and zero current.
The voltage on the inductor is Ed/2. Therefore, the power directs to source Ed/2 and iLr decreases. At the same time, as iV4 and iV6 increase, power is transmitted to the series inductors LR, LS and LT. As a result, the current meets with the relations below:
Since iS remains constant, iLr=0 when |iS|=iR+iT=iV4+iV6.
Mode e (t4~t5): iLr continues to decrease until its direction is reversed. Since diode VDA1 and VDA3 are off in reverse, the current on iLr remains zero. As a result, VA is switched off under zero current.
Mode f (t5~t6): Since the voltage on capacitor C4 is zero and is kept there, V4 can be switched off under zero-voltage. At this time iV4 decreases to zero, C4 starts charging and C1 starts discharging.
Mode g (t6~t7): At t6, uRN increases to Ed, and the voltage on C1 is zero. At this time, power is transmitted to the load form the R and S phase sources and the series inductors LR and LS. As a result, diode VD1 is switched on by the forward voltage.
Mode h (t7~t8): Similar to mode f, V6 is switched off under zero voltage. Meanwhile, iV6 decrease to zero, C6 start charging and C3 starts discharging.
Mode i (t8~t0): Similar to mode g, diode VD3 is switched on. At this time, operation returns to mode a.
B. Mathematical Analysis of the Resonance
1) Mathematical Analysis for Mode b: Due to the initial conditions iLr (t1)=0 and uLr=Ed/2, the voltage complies with:
and it can be derived that:
at t=t2, iLr (t2)=|iS|, i.e.
Thus:
2) Mathematical Analysis for Mode c: Fig. 5 shows diagrams of a simple equivalent resonant circuit. Assume that each capacitor is Cr, and that the initial conditions are uC4(t2)=uC6(t2)=Ed, i.e. UC4(S)= UC6(S)=Ed/S. Then the resonant current ir(t2)=0. For Fig. 5d, the following equation can be satisfied:
The solution gives:
Where:
So that:
at t=t’, i.e. when ir comes to its maximum, and makes a derivative with both parts of Equation (10). Moreover, let the left part be:
,then: cosωr(t1-t2)=0
It can be obtained that:
In Fig. 5a, the voltage on capacitors C4 and C6 are:
Substitute (8) into the above equation, then:
The solutions show that:
By substituting (11) into (14), it can be seen that the voltages on C4 and C6 comply with (15) when ir comes to its maximum:
When C4 and C6 discharge at t=t3, their voltages become zero. Therefore, let (14) equals zero, which results in:
Integrating (16) and (10), i.e. at t=t3, the resonant current ir follows:
It can be seen that, when iLr reaches its maximum, the voltages on C4 and C6 decrease from Ed to Ed/2. This is due to the fact that when uC4(uC6)>Ed/2, the voltage on Lr is positive (uC4-Ed/2>0). Therefore, as iLr increases (for iLr=iLr (t2)+ir (t-t2)=iS+ir (t-t2)), power accumulates gradually on Lr. Moreover, when uC4(uC6)=Ed/2, the voltage added on Lr becomes zero. Then iLr stops increasing, i.e. iLr comes to its maximum. As C4 and C6 discharge, uC4(uC6) start to decrease until uC4(uC6) Fig. 5.Diagrams of simple equivalent resonant circuit. 3) Working time of the auxiliary switch VA: For the sake of convenience, Fig. 3 use a saw-tooth carrier with a positive slope for a comparison of the voltages. The time when VA is switched on or when resonance starts is determined by uA. As shown in Fig. 3, the time that VA closes is ahead of the vertical edges of the saw-tooth carrier, namely at t1. According to the above analyzes in 1) and 2), the advance time shall be (Δt2+Δt3). Assume that the carrier period is Tc, the reference voltage uA can then be derived from: Or: Substituting (7) and (16) into this yields: Where: From Equation (19), the time that VA switches on should vary with changes in iS. In other words, it can follow the fluctuation of the load. However, the time when VA switches off should be behind of the vertical edges of the saw-tooth carrier, and its delay time should be longer than (t4-t3≈Δt3). A positive slope saw-tooth carrier can also be used to get solutions for the reference voltages uA or uB in all of the sections shown in Fig. 2. Equation (19) is also adaptable to all of the sections except that the reference current I should be valued as bellow: As above mentioned, when VA works, the resonance makes the input voltage of the bridges periodically decrease to zero, which provides the ZVS condition for the switches in the lower bridges. On the other hand, when VB works, the resonance will periodically increase the input voltage of the bridges to Ed, which creates ZVS for the switches in the upper bridges. 4) Design of the Resonance Parameters: The selection of resonance parameters considers not only achievement of zero-voltage soft-switching, but also the resonance time, the current and voltage stress, and additional losses, etc. From (10) and (11), the maximum value for ir can be deduced as follows: Where, the resonance impedance The resonant current ir affects the current stress, the on-state losses, and the turn-off losses of the auxiliary switches. Since the DC voltage Ed is related to the modulation ratio M, according to (20), the adjustable parameter affecting the resonant current is Zr. From the viewpoint of reducing loss, it is hoped that the resonant current is as small as possible, i.e. Zr is as large as possible. This can be achieved by increasing Cr or by reducing Lr. However, too much Zr can also cause problems. The resonant capacitor Cr should be optimized to ease the main switch turn-off loss in case it is too small [18]. Since Lr is related to the load current, too large a value for Lr might cause a prolonged rise time for ir, and it might affect the normal resonance. Therefore, the determination of Zr should meet with the resonance time at first, and consider the circuit loss [19]. The maximum commutation time (Δt2+Δt3) should be smaller than the switching dead time tdead of traditional hard-switching inverters, i.e. Δt2+Δt3 Where, ISmax is the maximum for is. The resonant frequency ωr should be set by optimizing the current stress, the on-state losses and the turn-off losses of the auxiliary switches. With the load current ISmax, the resonance current Irmax, and the optimized resonant capacitor Cr, the resonant inductance Lr is decided. The control system shown in Fig. 6 includes two parts: Fig. 6.Block diagram of control system. One part aims at realizing power factor correction (PFC) and keeping the DC-bus voltage constant. By measuring the line voltage eST and phase current iR, the power factor angle φ can be obtained after phase discrimination. Then it is transformed as the angle offset Δα, which is used in the PI regulator for phase control. By probing the DC bus voltage Ed, the value is transformed into the modulation ratio offset ΔM, which is used in the PI regulator for voltage control. The two PI regulators are realized by the following software algorithm: Based on the phase and amplitude control method, the three-phase modulation waves can be derived from Equation (2). The other part is to ensure that the ARCP circuit works in the soft-switching state. By detecting the direction of the three-phase current, the saw-tooth carrier adopts a positive slope or a negative slope. Then it compares this with the modulation waves and the PWM drive signals can be produced. By measuring the amplitude of the phase current, the auxiliary switch drive signals can be obtained according to Equation (13). Fig. 7 shows the phasor adjusting method for the rectifying mode, where the lag angle θ0 is the angle between phasors . UR is the virtual value of the fundamental component of phase R produced by PWM. It is deduced as: Fig. 7.The Phasor adjusting method for rectifying mode. For improving the system dynamic response, the transition curve near the upright side of the triangle in Fig. 8 should be shortened. In Fig. 8 on the condition of ensuring a unity power factor and a constant DC-bus voltage, when there is a sudden load increase, the converter cannot offer a sudden current immediately to series inductance in input side of the converter, at the time only capacitors can offer the sudden current, thus the output DC current of the system next steady state is expressed by By following the energy balance between the AC side and the DC side of the converter, the following is obtained: For uc is Ed, with the right angle triangular diagram, (26) can be rewritten as: Taking Δθ0′ as small, (27) is linearized as: where: In a way similar to the Δθ0′ derivation, according to the right-angled triangle relations between phasors, the following is obtained: The change of the modulation is deduced as: where, k2 and k3 are the proportion factor. When the second portion in (30) is small and can be omitted, (30) approximates to: From (28) and (31), it is known that the variable load current is detected indirectly by a change of the DC voltage. This feeds the control system for the next steady state as an additional control variable to generate Δθ0′ and ΔM′. Therefore, the system control equation is: Fig. 8.Simulation waveforms. Accordingly the control system in Fig. 6, a simulation model based on Pspice software is built. The main parameters used in the simulation are as follows: Fig. 8 shows the simulation waveforms. In Fig. 8(a) the upper curve is the R phase voltage eR, and the lower curve is the R phase current iR. In Fig. 8(b), from top to bottom, the curves are the voltage ugA of the VA driver signal, the voltage uc4 of snubber C4, the current iLr of the inductor Lr, and the voltage ug4 of the V4 driver signal. In Fig. 8, the input phase R current keeps in phase with the source phase R voltage. In the process of the system power conversion, the main switch turns on under the ZVS condition, and the auxiliary switch conducts in the ZCS state. The simulation results conform to the theory discussed previously. A 1kW prototype system is constructed for experimental verification. The system control is implemented on a platform consisting of a digital signal processor (DSP). The main parameters used in the experiment are as same as those used in the simulation. The experimental results obtained from the prototype system are shown in Fig. 9. Fig. 9Experimental waveforms. Fig. 9(a) shows in rectifying state, where the total input power factor (PF) of the phase current is 99.85% and the total harmonic distortion (THD) is 5.4%. Fig. 9(b)-9(d) show the experimental waveforms for the resonance of the ZVS. Fig. 9(c) is a partially enlarged detail drawing of Fig. 9(b). As can be seen, when uc4 is discharged to zero for resonance, the turning-on of V4 is in the zero voltage state. Because the voltage of the snubber capacitor cannot change immediately, the power switches always turn off in zero voltage. If the turning-on time of Gv4 is delayed 1μs, the voltage uc4 will rise owing to the energy of the resonant inductor, and the turning-on of V4 is not in the zero voltage state. Fig. 10 shows the converter efficiency versus the output power. The efficiency of the soft-switching rectifier improves by about 2.1% at 1.02kW when compared with the conventional SPWM hard-switching topology. Fig. 10.Efficiency Comparison. An auxiliary resonant commutated pole topology for three-phase PWM rectifiers is proposed. A detailed analysis and experiments are given based on its working principle, control strategy and resonant modes. Simulation and experiment results prove the consistency on a mathematical basis. The proposed rectifier shows improvements on simpler structures when compared to the conventional ARCP while maintaining its efficiency. As a result, it is achieves cost-savings in hardware due to its simplified main circuit topology. Nonetheless, the minimum peak current in resonating and the least switching PWM mode enhance its advantages of high efficiency and easy control.IV. SIMULATION AND EXPERIMENTAL RESULT
A. Control System
B. Current Feedback Control
C. Simulation Verification
D. Experimental Results
V. CONCLUSIONS
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