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Cu 전해도금을 이용한 TSV 충전 기술

TSV Filling Technology using Cu Electrodeposition

  • 기세호 (서울시립대학교 공과대학 신소재공학과) ;
  • 신지오 (서울시립대학교 공과대학 신소재공학과) ;
  • 정일호 ;
  • 김원중 (서울시립대학교 공과대학 신소재공학과) ;
  • 정재필 (서울시립대학교 공과대학 신소재공학과)
  • Kee, Se-Ho (Dept. of Materials Science and Engineering, University of Seoul) ;
  • Shin, Ji-Oh (Dept. of Materials Science and Engineering, University of Seoul) ;
  • Jung, Il-Ho (Defense Agency for Technology and Quality) ;
  • Kim, Won-Joong (Dept. of Materials Science and Engineering, University of Seoul) ;
  • Jung, Jae-Pil (Dept. of Materials Science and Engineering, University of Seoul)
  • 투고 : 2014.05.30
  • 심사 : 2014.06.17
  • 발행 : 2014.06.30

초록

TSV(through silicon via) filling technology is making a hole in Si wafer and electrically connecting technique between front and back of Si die by filling with conductive metal. This technology allows that a three-dimensionally connected Si die can make without a large number of wire-bonding. These TSV technologies require various engineering skills such as forming a via hole, forming a functional thin film, filling a conductive metal, polishing a wafer, chip stacking and TSV reliability analysis. This paper addresses the TSV filling using Cu electrodeposition. The impact of plating conditions with additives and current density on electrodeposition will be considered. There are additives such as accelerator, inhibitor, leveler, etc. suitably controlling the amount of the additive is important. Also, in order to fill conductive material in whole TSV hole, current wave forms such as PR(pulse reverse), PPR(periodic pulse reverse) are used. This study about semiconductor packaging will be able to contribute to the commercialization of 3D TSV technology.

키워드

참고문헌

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