A Study on Implementing a Phase-Shift Full-Bridge Converter Employing an Asynchronous Active Clamp Circuit

Abstract

The conventional Phase-Shift Full-Bridge (PSFB) converter has a serious voltage spike because of the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches. To overcome this problem, an asynchronous active clamp technique employing an auxiliary DC/DC converter has been proposed. However, an exact analyses for designing the auxiliary DC/DC converter has not been presented. Therefore, the amount of power that is supposed to be handled in the auxiliary DC/DC converter is calculated through a precise mode analyses in this paper. In addition, this paper proposes a lossy snubber circuit with hysteresis characteristics to reduce the burden that the auxiliary DC/DC converter should take during the starting interval. This technique results in optimizing the size of the magnetic component of the auxiliary DC/DC converter. The operational principles and the theoretical analyses are validated through experiments with a 48V-to-30V/15A prototype.

I. INTRODUCTION

Recently, many dc-dc topologies for the distributed power supplies of telecommunication or server systems have been developed. These topologies are characterized by high power conversion efficiency and density. Among these topologies, a conventional zero-voltage-switching phase-shift full-bridge (ZVS PSFB) converter has received considerable attention for use in medium to high power applications, because it features high power conversion efficiency and a high power density [1]-[4].

However, the conventional PSFB converter has a major disadvantage in terms of the ringing spike voltage across the secondary-side rectifier switches, which occurs due to the resonance between the leakage inductance of transformer and the stray output capacitance of the secondary-side rectifier switches. This brings EMI problems and an increase of the conduction loss due to using higher voltage rating switches. Furthermore, it causes heating of transformer, since the ringing is primarily damped out by the transformer resistance [5].

Therefore, a snubber circuit is needed to reduce the voltage stress on the rectifier switches. Recently, many studies have been conducted on active clamp methods using an active switch on the snubber circuit. One method uses a synchronous active clamp circuit across the rectifiers. It alleviates the ringing voltage in the secondary side rectifier switches and recovers the energy which is absorbed by the clamping capacitor to the input or output of the converter every switching cycle using an active switch on the snubber circuit [5]-[7].

Another method uses an asynchronous active clamp circuit. This method restores the ringing energy of the secondary side rectifier switches to the load through an auxiliary DC/DC converter. The control of the auxiliary DC/DC converter is independent from the main converter. Thus, small magnetic components can be used because of operating at a higher switching frequency than the main switch [8], [9].

However, an exact analyses of this technique for designing the auxiliary DC/DC converter has not been presented. In addition, this approach has common practical drawbacks such as a large ringing energy of the clamp capacitor during the starting interval and a constant clamping voltage unrelated to variation of the input voltage.

In this paper, a full bridge DC/DC converter using an asynchronous active clamp circuit attached at the secondary side of the transformer is shown in Fig. 1. The amount of power is calculated through precise mode analyses, and that power is supposed to be handled in the auxiliary DC/DC converter. Therefore, the optimized inductor size of the auxiliary DC/DC converter can be designed, and the large overshoot energy of the clamp capacitor for the starting interval is consumed through the resistor (RHy) connected in parallel with the clamp capacitor. Thus, problems such as the saturation of the magnetic devices and the destruction of the semiconductor devices due to a large current peak value on the auxiliary DC/DC converter do not occur. In addition, the proposed technique can control the clamping voltage which depends on variations of the input voltage. Therefore, the voltage across the rectifier switches can be clamped to a certain voltage level within the entire range of the input voltage. Therefore, the overall efficiency of the converter is increased because the ringing energy is recovered to the load through the auxiliary DC/DC converter. These advantages make the proposed converter well suited for high-voltage and high-power applications like the power supplies for telecommunication or server systems.

Fig. 1.The Phase-Shift Full-Bridge DC-DC converter with the asynchronous active clamp technique.

The operations, analysis, design considerations and experimental results are presented to confirm the validity of the converter.

 

II. OPERATIONAL PRINCIPLES

A. Operational Principles

Fig. 1 shows a circuit diagram of a Phase-Shift Full-Bridge DC-DC converter using the asynchronous active clamp technique with a current doubler in the secondary side. The converter also employs phase-shift control. The gates of M1 (and M2) along with M3 (and M4) are complimentarily turned on and off with a 50% fixed duty. In the converter, switches M1-M4 form the inverter bridge, MSR1 and MSR2 are the rectifier switches and D1, D2, Ccl and the Buck DC-DC converter are the voltage clamping circuit. MHy and RHy operate through a lossy snubber circuit with hysteresis characteristics for the start-on interval. In addition, the converter with the proposed technique detects the input voltage. The sensed input voltage is applied to the input of an Error Amplifier in order to change the clamping voltage depending on the input voltage.

B. Mode Analysis

Fig. 2 shows the operational key waveforms of a Phase Shift Full Bridge DC/DC converter with the asynchronous active clamp technique. The converter has seven modes of operation during a half switching cycle. However, the only mode1 and mode2 are needed to calculate the amount of power which the auxiliary DC/DC converter is supposed to handle. For the sake of convenience of the mode analysis in the steady state, several assumptions are made as follows.

Fig. 2.Operational Key waveforms of the Phase-Shift Full-Bridge DC-DC converter with the asynchronous active clamp technique.

Before t0, IMSR1 = 0, and it is assumed that M1, M2 and MSR2 are conducting.

Mode1 (t0-t1): M1, M2 and MSR2 are conducting and the input voltage is applied to the primary side of the transformer. In this mode, the voltage across switch MSR1 is increased to its maximum value because of the resonance between the leakage inductance of the transformer and the parasitic output capacitance of switch MSR1.

VMSR1(t) and VLk(t) are expressed as follows:

This mode ends when VMSR1(t) reaches Vcl.

Mode2 (t1-t2): At t1, VMSR1 = Vcl, clamp circuit diode D1 is turned on, and then the rectifier switch voltage across MSR1 is clamped. M1, M2 and MSR2 are still conducting and the clamp voltage Vcl is applied to the secondary of the transformer. Therefore, VLk and the current slope of the leakage inductor Lk are expressed as follows:

ID1 reaches zero at the end of this mode.

 

III. ANALYSIS AND DESIGN CONSIDERATIONS

A. Power of the Clamp Circuit

Fig. 3 shows an equivalent circuit diagram that operates during Mode1 (t0~t1). As shown in this figure, a resonant LC circuit is formed, and both VCx(t) and iCx(t) are expressed as follows:

Fig. 3.Equivalent circuit during Mode 1(t0 ~ t1).

Where Cx is defined as Cj1+Coss1.

At t1, VCx(t1) = Vcl. Therefore, t1-t0 is expressed as follows:

By substituting (7) into (6), iD1pk(t1) can be obtained as follows:

Fig. 4 shows an equivalent circuit diagram that operates during t1~t2. As shown in this figure, the current slope of the leakage inductor Lk is:

Fig. 4.Equivalent circuit during Mode 2(t1 ~ t2).

The current slope of the output inductor Lo1 is:

The iD1 current slope is [Current slope of Lk - Current slope of Lo1]. It is expressed as follows:

From equations (8) and (11), the power of the clamp circuit can be calculated.

Fig. 5 shows the D1 current waveform during t0~t2. The area of A can be obtained by using the area formula of a triangle because the diode D1 current waveform is a triangle.

Fig. 5.D1 current waveform during Mode 1&2(t0 ~ t2).

The average current of D1 is obtained by multiplying the area by the switching frequency.

A RCD clamp circuit is used when the resistance value is obtained using equation (13) and the power of the clamp circuit can be derived from (14) as:

The average current is multiplied by 2 in equation (14) because diodes D1 and D2 alternate with each other during one switching period. Finally, the power of the clamp circuit is obtained in equation (15).

B. Control Technology during the Start-on Interval

During the starting interval, the current charging the output voltage to the steady state increases the ringing energy. If the auxiliary DC/DC converter operates in the starting interval, the large overshoot energy causes a large current peak in the auxiliary DC/DC converter because the output voltage does not reach the steady-state. Therefore, problems can occur such as the saturation of the magnetic devices and the destruction of the semiconductor devices on the asynchronous active clamp circuit. For these reasons, an additional circuit is required to consume the large overshoot energy using MHy and RHy during the start-on interval.

Fig. 6 shows the part made up of switch (MHy) and resistor (RHy) in parallel with the clamp capacitor. This acts like an RCD snubber when switch (MHy) is turned on. The operational principle is shown in Fig. 7. As shown in Fig. 7(a), a lossy snubber circuit with hysteresis characteristics detects the clamp voltage (Vcl) and the sensed input voltage (Vin_sense). Resistor (R5) and capacitor (C2) are designed by considering the time to reach the steady-state. If the divided clamp voltage by resistors (R1 and R2) is greater than the sensed input voltage which is divided by resistors (R3 and R4), the switch (MHy) is turned on, and the clamping capacitor is discharged through resistor (RHy). In the opposite case, switch (MHy) is turned off, and the clamping capacitor is charged. When the output voltage reaches the steady state, the Buck converter is operated.

Equation (16) is the current slope of the Buck converter when switch (MHy) is turned on and Equation (17) is the current slope of the Buck converter when switch (MHy) is turned off. The current slope in equation (17) is proportional to the output voltage. Therefore, if the Buck converter operate in the start-on interval, the peak current of the Buck converter will increase. To prevent such a problem, the hysteresis switch (MHy) and resistor (RHy) consume the large overshoot energy through the lossy snubber circuit in the start-on interval, and the Buck converter operates when the output voltage is reached at the steady-state. Then the large peak current will not occur. Fig. 7(b) shows the operational key waveforms of the lossy snubber circuit with hysteresis characteristics.

Fig. 6.Added lossy snubber circuit with hysteresis characteristic.

Fig. 7.Lossy snubber circuit during start-on interval and its Waveforms.

C. Control Technique for the Wide Range of the Input Voltage

In most cases, the clamp voltage is higher than the input voltage which is obtained by the turn ratio of the transformer. Therefore, a circuit for detecting the input voltage is needed to control the clamp voltage depending on the input voltage.

Fig. 8 shows the method used for detecting the input voltage. The input voltage can be sensed by adding an auxiliary winding to the flyback converter for generating the auxiliary power of the IC (integrated circuit). In Fig. 8, the voltage command is changed according to the input voltage, and the turn ratio of the transformer. Therefore, the voltage command of the auxiliary DC/DC converter can be applied differently depending on the input voltage.

Fig. 8.Circuit diagram for detecting the input voltage.

Fig. 9 shows the voltage control method of the clamp capacitor for coping with the wide range of the input voltage. The divided clamp voltage by the resistor is applied to the input of the Error Amplifier. Thus, it can be controlled depending on the input voltage through the negative feedback.

Fig. 9.Control method for the wide range of the input voltage.

D. Design Consideration

Design Procedure

 

IV. EXPERIMENT RESULTS

A 450W (input voltage 48V, output voltage 30V, output current 15A), 150kHz prototype of the proposed ZVS full-bridge PWM DC-DC converter has been implemented to verify the principle of the operation. The parameters of the circuit are as follows:

A photograph of the prototype is shown in Fig. 10. Fig. 10(a) and Fig. 10(b) illustrate the controller stage and the power stage of the prototype, respectively.

Fig. 10.Photograph of the prototype.

Fig. 11 shows the waveforms of the secondary transformer voltage (Vsec), the primary current (Ipri), the output current (ILo1), and the output current of the auxiliary DC/DC converter (IBuck). When the input voltage is 42V and the clamp voltage is 90V, the wattage handled by the auxiliary DC/DC converter is calculated as 14.48W using equation (5)-(15). In addition, the output power of the auxiliary DC/DC converter is 13.34W and the efficiency is 95% in Fig. 11. It can be seen that the mode analysis is accurate from the fact that the error rate is 3.3%.

Fig. 11.Waveforms for the wattage analysis which the auxiliary DC/DC converter is supposed to handle with. [Vin=42V, Vcl=90V]

Fig. 12 shows the waveforms of the secondary transformer voltage (Vsec), the clamp voltage (Vcl), and voltage of the secondary rectifier switches, MSR1 and MSR2. These waveforms indicate that control method has been applied to cope with the wide range of the input voltage.

Fig. 12.Waveforms of the clamp voltage depending on the input voltage.

Fig. 13 shows the waveforms of the output voltage (Vo), the clamp voltage (Vcl), the output current of the auxiliary DC/DC converter (IBuck), and the output current (ILo1) during the starting interval. Fig. 13(a) illustrates the waveforms of the PSFB converter employing an asynchronous active clamp circuit with the proposed technique in the starting interval. It can be seen that MHy and RHy consume the large overshoot energy through the lossy snubber circuit before the output voltage reaches the steady-state. After that, the Buck converter works. Therefore, the large peak current will not occur in the auxiliary DC/DC converter. On the other hand, Fig. 13(b) shows the waveforms of the conventional PSFB converter employing an asynchronous active clamp circuit. In Fig. 13(b), the output current of the Buck converter (IBuck) is increased. This can cause the destruction of semiconductor devices and saturation of the magnetic devices.

Fig. 13.Waveforms during starting-interval.

Fig. 14 illustrates the efficiency curve at Vin = 50V. The maximum efficiency is 94.87% at 8A and the efficiency at the full load (15A) is 93.24%.

Fig.14.Efficiency of the converter.

 

V. CONCLUSIONS

This paper presents an exact analyses of a ZVS-FB-PWM converter employing an asynchronous active clamp circuit. The wattage that is handled by the auxiliary DC/DC converter is calculated through a precise mode analysis. Therefore, the optimized inductor size of the auxiliary DC/DC converter can be designed. Moreover, the large overshoot energy during the starting interval is consumed through a lossy snubber circuit. As a result, the converter with the proposed technique can considerably improve the reliability of a system.

This paper also presents a voltage control method of the clamp capacitor to cope with the wide range of the input voltage. The converter using the proposed technique effectively reduce the voltage stress on the rectifier switches within the entire range of the input voltage. The ringing energy is recovered to the load through the Buck converter. Therefore, the overall efficiency of the converter is increased.

Finally, experiments were performed to verify the proposed technique. A converter having these advantages is expected to be well suited for high power density applications.