SiGe 에피 공정기술을 이용하여 제작된 초 접합 금속-산화막 반도체 전계 효과 트랜지스터의 시뮬레이션 연구

Simulation Studies on the Super-junction MOSFET fabricated using SiGe epitaxial process

  • 이훈기 (전북대학교 반도체화학공학부 반도체 물성 연구소) ;
  • 박양규 (전북대학교 반도체화학공학부 반도체 물성 연구소) ;
  • 심규환 (전북대학교 반도체화학공학부 반도체 물성 연구소) ;
  • 최철종 (전북대학교 반도체화학공학부 반도체 물성 연구소)
  • Lee, Hoon-Ki (School of Semiconductor and Chemical Engineering, Semiconductor Physic Research Center, (SPRC), Chonbuk National University) ;
  • Park, Yang-Kyu (School of Semiconductor and Chemical Engineering, Semiconductor Physic Research Center, (SPRC), Chonbuk National University) ;
  • Shim, Kyu-Hwan (School of Semiconductor and Chemical Engineering, Semiconductor Physic Research Center, (SPRC), Chonbuk National University) ;
  • Choi, Chel-Jong (School of Semiconductor and Chemical Engineering, Semiconductor Physic Research Center, (SPRC), Chonbuk National University)
  • 투고 : 2014.09.02
  • 심사 : 2014.09.22
  • 발행 : 2014.09.30

초록

In this paper, we propose a super-junction MOSFET (SJ MOSFET) fabricated through a simple pillar forming process by varying the Si epilayer thickness and doping concentration of pillars using SILVACO TCAD simulation. The design of the SJ MOSFET structure is presented, and the doping concentration of pillar, breakdown voltage ($V_{BR}$) and drain current are analyzed. The device performance of conventional Si planar metal-oxide semiconductor field-effect transistor(MOSFET), Si SJ MOSFET, and SiGe SJ MOSFET was investigated. The p- and n-pillars in Si SJ MOSFET suppressed the punch-through effect caused by drain bias. This lead to the higher $V_{BR}$ and reduced on resistance of Si SJ MOSFET. An increase in the thickness of Si epilayer and decrease in the former is most effective than the latter. The implementation of SiGe epilayer to SJ MOSFET resulted in the improvement of $V_{BR}$ as well as drain current in saturation region, when compared to Si SJ MOSFET. Such a superior device performance of SiGe SJ MOSFET could be associated with smaller bandgap of SiGe which facilitated the drift of carriers through lower built-in potential barrier.

키워드

참고문헌

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