참고문헌
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피인용 문헌
- A 1.5–5.0 Gb/s clock and data recovery circuit with dual-PFD phase-rotating phase locked loop vol.11, pp.11, 2014, https://doi.org/10.1587/elex.11.20140351
- Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement vol.15, pp.2, 2015, https://doi.org/10.5573/JSTS.2015.15.2.184