Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
권호 표지
DOI QR코드

DOI QR Code

Algebraic Accuracy Verification for Division-by-Convergence based 24-bit Floating-point Divider Complying with OpenGL

Division-by-Convergence 방식을 사용하는 24-비트 부동소수점 제산기에 대한 OpenGL 정확도의 대수적 검증

  • Yoo, Sehoon (Dept. of Electrical and Computer Engineering, University of Seoul) ;
  • Lee, Jungwoo (Dept. of Electrical and Computer Engineering, University of Seoul) ;
  • Kim, Kichul (Dept. of Electrical and Computer Engineering, University of Seoul)
  • Received : 2013.08.30
  • Accepted : 2013.09.16
  • Published : 2013.09.30
Download PDF
⟨ Previous Next ⟩

Abstract

Low-cost and low-power are important requirements in mobile systems. Thus, when a floating-point arithmetic unit is needed, 24-bit floating-point format can be more useful than 32-bit floating-point format. However, a 24-bit floating-point arithmetic unit can be risky because it usually has lower accuracy than a 32-bit floating-point arithmetic unit. Consecutive floating-point operations are performed in 3D graphic processors. In this case, the verification of the floating-point operation accuracy is important. Among 3D graphic arithmetic operations, the floating-point division is one of the most difficult operations to satisfy the accuracy of $10^{-5}$ which is the required accuracy in OpenGL ES 3.0. No 24-bit floating-point divider, whose accuracy is algebraically verified, has been reported. In this paper, a 24-bit floating-point divider is analyzed and it is algebraically verified that its accuracy satisfies the OpenGL requirement.

모바일 시스템에서는 비용 및 전력 효율이 중요하기 때문에 부동소수점 연산기 개발 시 32-비트 데이터 형식대신 24-비트 데이터 형식을 사용하는 것이 좋다. 하지만 24-비트 데이터 형식을 사용할 경우 32-비트 데이터 형식에 비해 연산기의 정확도가 낮아질 수 있다. 3D 그래픽과 같이 연속적인 부동소수점 연산 처리가 많이 요구될 경우 연산기의 정확도에 대한 논의와 검증이 중요하다. 나눗셈은 3D 그래픽에 사용되는 연산 중 OpenGL에서 규정한 정확도를 만족하기 가장 어려운 연산 중 하나이다. 현재까지 OpenGL에서 규정한 정확도를 만족하는 것이 대수적으로 검증된 24-비트 부동소수점 제산기는 알려진 바가 없다. 본 논문에서는 24-비트 부동소수점 제산기를 분석하고, OpenGL ES 3.0에서 규정한 $10^{-5}$의 정확도를 만족함을 대수적으로 검증한다.

Keywords

References

  1. B. Lipchak, "OpenGL ES Version 3.0," Khronos Group Inc., Aug. 2012
  2. K. Y. Lee, "A design of a floating point unit with 3 stages for a 3D graphics shader engine," Journal of IKEEE, vol. 11, no. 4, pp. 358-363, Dec. 2007.
  3. J. S. Ha, H. G. Jeong, S. Y. Kim, and K. Y. Lee, "Design of a 3D graphics geometry accelerator using the programmable vertex shader," Journal of IEEK SD, vol. 43, no. 9, pp. 53-58, Sep. 2006.
  4. C. Lee, "Design of square root and inverse square root arithmetic units for mobile 3D graphic processing," Journal of IEEK SD, vol. 46, no. 3, pp. 20-25, March 2009.
  5. Y. Kweon and K. Kim, "A floating-point divider for mobile 3D graphics processors," International SoC Conference (ISOCC), pp. 545-548, Oct. 2006.
  6. F. Sheikh, S. K. Mathew, M. A. Anders, H. Kaul, S. K. Hsu, A. Agarwal, R. K. Krishnamurthy, and S. Borkar, "A 2.05 GVertices/s 151 mW lighting accelerator for 3D graphics vertex and pixel shading in 32 nm CMOS," IEEE Journal of Solid-State Circuits, vol. 48, no. 1, pp. 128-139, Jan. 2013. https://doi.org/10.1109/JSSC.2012.2222813
  7. S. Hsiao, P. Wu, C. Wen, and L. Chen, "Design of a programmable vertex processor in OpenGL ES 2.0 mobile graphics processing units," International Symposium on VLSI Design, Automation, and Test (VLSI-DAT), pp. 1-4, April 2013.
  8. I. Koren, Computer Arithmetic Algorithms 2nd ed., A K Peters, Massachusetts, Nov. 2001.
  9. N. Louvet, J. M. Muller, and A. Panhaleux, "Newton-Raphson algorithms for floating-point division using an FMA," IEEE International Conferfence on Application-specific Systems Architectures and Processors (ASAP), pp. 200-207, July 2010.
  10. D. M. Russinoff, "Computation and formal verification of SRT quotient and square root digit selection tables," IEEE Transactions on Computers, vol. 62, no. 5, pp. 900-913, May 2013. https://doi.org/10.1109/TC.2012.40
  11. ANSI/IEEE std 7544-1985, "IEEE Standard for Binary Floating-Point Arithmetic," 1985.