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Voltage Dip Compensation Algorithm Using Multi-Level Inverter

멀티레벨 인버터의 순간정전 보상알고리즘에 관한 연구

  • Yun, Hong-Min (Automation R&D Center, LSIS Corporation, Ltd.) ;
  • Kim, Yong (Division of Electronics and Electrical Engineering, Dongguk University)
  • 윤홍민 (LS산전 자동화제품연구소) ;
  • 김용 (동국대학교(서울) 전자전기공학부)
  • Received : 2013.10.10
  • Accepted : 2013.11.06
  • Published : 2013.12.31

Abstract

Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

Keywords

References

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