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A New High-Efficiency CMOS Darlington-Pair Type Bridge Rectifier for Driving RFID Tag Chips

RFID 태그 칩 구동을 위한 새로운 고효율 CMOS 달링턴쌍형 브리지 정류기

  • Park, Kwang-Min (Dept. of Electrical and Electronic Engineering, Soonchunhyang University)
  • 박광민 (순천향대학교 전기전자공학과)
  • Received : 2012.01.12
  • Accepted : 2012.04.12
  • Published : 2012.04.30

Abstract

In this paper, a new high-efficiency CMOS bridge rectifier for driving RFID tag chips is designed and analyzed. The input stage of the proposed rectifier is designed as a cascade structure connected with two NMOSs for reducing the gate capacitance by circuitry method, which is the main path of the leakage current that is increased when the operating frequency is increased. This gate capacitance reduction technique using the cascade input stage for reducing the gate leakage current is presented theoretically. The output characteristics of the proposed rectifier are derived analytically using its high frequency small-signal equivalent circuit. For the general load resistance of $50K{\Omega}$, the proposed rectifier shows better power conversion efficiencies of 28.9% for 915MHz UHF (for ISO 18000 -6) and 15.3% for 2.45GHz microwave (for ISO 18000-4) than those of 26.3% and 26.8% for 915MHz, and 13.2% and 12.6% for 2.45GHz of compared other two existing rectifiers. Therefore, the proposed rectifier may be used as a general purpose rectifier to drive tag chips for various RFID systems.

본 논문에서는 RFID 태그 칩 구동을 위한 새로운 고효율 CMOS 브리지 정류기를 설계하고 해석하였다. 동작 주파수가 높아짐에 따라 증가하는 게이트 누설전류의 주 통로가 되는 게이트 커패시턴스를 회로적인 방법으로 감소시키기 위해 제안한 정류기의 입력단을 두 개의 NMOS로 종속접속형으로 연결하여 설계하였으며, 이러한 종속접속형 입력단을 이용한 게이트 커패시턴스 감소 기법을 이론적으로 제시하였다. 또한 제안한 정류기의 출력특성은 고주파 소신호 등가회로를 이용하여 해석적으로 유도하였다. 일반적인 경우의 $50K{\Omega}$ 부하저항에 대해, 제안한 정류기는 915MHz의 UHF(for ISO 18000-6)에서는 28.9%, 2.45GHz의 마이크로파 대역 (for ISO 18000-4)에서는 15.3%의 전력변환효율을 보여, 915MHz에서 26.3%와 26.8%, 2.45GHz에서 13.2%와 12.6%의 전력변환효율을 보인 비교된 기존의 두 정류기에 비해 보다 개선된 전력변환효율을 보였다. 따라서 제안한 정류기는 다양한 종류의 RFID 시스템의 태그 칩 구동을 위한 범용 정류기로 사용될 수 있을 것이다.

Keywords

References

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