• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.4
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• pp.1789-1796
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• 2012

In this paper, a new high-efficiency CMOS bridge rectifier for driving RFID tag chips is designed and analyzed. The input stage of the proposed rectifier is designed as a cascade structure connected with two NMOSs for reducing the gate capacitance by circuitry method, which is the main path of the leakage current that is increased when the operating frequency is increased. This gate capacitance reduction technique using the cascade input stage for reducing the gate leakage current is presented theoretically. The output characteristics of the proposed rectifier are derived analytically using its high frequency small-signal equivalent circuit. For the general load resistance of $50K{\Omega}$, the proposed rectifier shows better power conversion efficiencies of 28.9% for 915MHz UHF (for ISO 18000 -6) and 15.3% for 2.45GHz microwave (for ISO 18000-4) than those of 26.3% and 26.8% for 915MHz, and 13.2% and 12.6% for 2.45GHz of compared other two existing rectifiers. Therefore, the proposed rectifier may be used as a general purpose rectifier to drive tag chips for various RFID systems.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.3
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• pp.273-280
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• 1990

To prevent the shoot-through phenomena in a PWM inverter, a short dead time is usually provided between a pair of switching transistors in the same leg of the inverter. In this approach, the amount of the dead time is designed to meet the worst case condition of the inverter transistors and the base drive elements. So, in normal cases, relatively large portion of the dead time is unnecessary and it results in an undesirablecurrent waveform distortion and generates ripple torque on the motor shaft. In this paper, a new base drive method to remove the undesirable portion of the dead time is described. The method senses the transistor on/off states to interlock the other transistor of the leg without the external dead time. Also, for the transistors of large current rating, the Darlington drive circuit is combined to the proposed method and is tested to verify the effectiveness. The experimental results of the proposed method are described and compared with those of the conventional dead time method.