The Journal of the Korea institute of electronic communication sciences (한국전자통신학회논문지)

Korea Institute of Electronic Communication Science (한국전자통신학회)
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Design of QR Decomposition Processor for GDFE

GDFE를 위한 QR분해 프로세서 설계

  • Received : 2011.02.16
  • Accepted : 2011.04.12
  • Published : 2011.04.30
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Abstract

This paper presents a QR decomposition processor by exploiting Givens rotation for the GDFE (Generalized Decision Feedback Equalizer). A Givens rotation consists of phase extraction, sine/cosine generation and angle rotation parts. Combining two-stage method (coarse and fine stage) and the fixed-width modified-Booth multiplier, we design an efficient QR decomposition processor. By simulations, it is shown that the proposed QR decomposition processor can be a feasible solution for GDFE.

본 논문에서는 Givens 회전을 이용하여 GDFE(Generalized Decision Feedback Equalizer)에 사용되는 효율적인 QR분해 프로세서를 제안한다. Givens 회전은 위상추출와 sine/cosine 값 생성 및 각회전를 이용하여 수행할 수 있다. 효율적으로 Givens 회전 연산을 수행하기 위해 2단계 기법을 적용하여 위상추출기, sine/cosine 값 생성 및 각회전기를 설계하였으며, 회로들에 포함되는 곱셈기는 고정길이 modified-Booth 곱셈기를 적용하였다. 시뮬레이션을 통하여 제안한 QR분해 프로세서가 GDFE에 적용 가능함을 보인다.

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References

  1. G. Ginis, Y. Bar-Ness and J. M. Cioffi, "Blind adaptive MIMO decision feedback equalization using Givens rotations", In Proceedings of International Conference on Communications (ICC) 2002, vol.1, pp.59-63, 2002.
  2. S. Wang, V. Piuri and E. Swartzlander, Jr., "Hybrid CORDIC algorithm", IEEE Transactions on Computers, vol.46, no.11, pp.1202-1207, Nov. 1997. https://doi.org/10.1109/12.644295
  3. D. D. Hang, D. Fu and A. N. Willson, Jr., "A 400-MHz processor for the conversion of rectangular to polar coordinates in $0.25-{\mu}m$ CMOS", IEEE Journal of Solid-State Circuits, vol.38, no.3, pp.1771-1775, Oct. 2003. https://doi.org/10.1109/JSSC.2003.817588
  4. D. Fu and A. N. Willson, Jr., "A high-speed processor for digital sine/cosine generation and angle rotation", In Proceedings of 32nd Asilomar Conference on Signals, Systems, and Computer, vol.1, pp.177-181, 1998.
  5. K. J. Cho, K. C. Lee, J. G. Chung and K. K. Parhi, "Design of low error fixed-width modified Booth multiplier", IEEE Transactions on VLSI systems, vol.12, no.5 pp.522-531, May 2004. https://doi.org/10.1109/TVLSI.2004.825853