Journal of the Korea Academia-Industrial cooperation Society (한국산학기술학회논문지)

The Korea Academia-Industrial cooperation Society (한국산학기술학회)
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Biased Multistage Inter connection Network in Multiprocessor System

다중프로세서 시스템에서 편향된 다단계 상호연결망

  • Choi, Chang-Hoon (School of Computer Information, Kyungpook National University)
  • 최창훈 (경북대학교 컴퓨터정보학부)
  • Received : 2011.02.15
  • Accepted : 2011.04.07
  • Published : 2011.04.30
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Abstract

There has been a lot of researches to develop techniques that provide redundant paths, there by making Multistage Interconnection Networks(MINs) fault tolerant. So far, the redundant paths in MINs have been realized by adding additional hardware such as extra stages or duplicated data links. This paper presents a new MIN topology called Hierarchical MIN. The proposed MIN is constructed with 2.5N-4 switching elements, which are much fewer than that of the classical MINs. Even though there are fewer hardware than the classical MINs, the HMIN possesses the property of full access and also provides alternative paths for the fault tolerant. Furthermore, since there is the short cut in HMIN for the localized communication, it takes advantage of exploiting the locality of reference in multiprocessor systems. Its performance under varying degrees of localized communication is analysed and simulated.

다단계 상호 연결망(MIN)에 중복 경로를 제공하여 오류를 허용하는 기술을 개발하기 위하여 많은 연구가 진행되어 왔다. 지금까지 MIN에서 중복 경로는 추가된 stage와 중복된 데이터 경로 같은 추가 적인 하드웨어를 첨가함으로써 실현되었다. 본 논문은 계층적 MIN이라는 새로운 위상의 MIN을 제안한다. 제안된 MIN은 기존의 MIN보다 적은 2.5N-4개의 스위칭소자를 사용하여 구성되었다. 비록 기존의 MIN 보다 적은 하드웨어를 사용할지라도 완전 접근 성질을 가지고 있으며, 또한 오류 허용을 위한 선택적 중복 경로를 제공한다. 더욱이 HMIN에서는 지역화된 통신을 위한 지름길이 제공되어 다중 프로세서 시스템에서 지역 참조성을 활용하는 장점을 갖게 된다. 지역참조성의 정도를 변화시키며 제안된 시스템의 성능을 분석하였으며 모의실험을 수행하였다.

Keywords

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