한국전자파학회논문지 (The Journal of Korean Institute of Electromagnetic Engineering and Science)

  • 제21권9호
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  • Pages.1045-1049
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  • 2010
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  • 1226-3133(pISSN)
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  • 2288-226X(eISSN)
한국전자파학회 (The Korean Institute of Electromagnetic Engineering and Science)
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초 저전력 CMOS 2.4 GHz 저잡음 증폭기 설계

Design of an Ultra Low Power CMOS 2.4 GHz LNA

  • Jang, Yo-Han (Department of Electronics and Computer Engineering, Hanyang University) ;
  • Choi, Jae-Hoon (Department of Electronics and Computer Engineering, Hanyang University)
  • 발행 : 2010.09.30
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초록

본 논문에서는 2.4 GHz 대역에 적용할 수 있는 초 저전력 저잡음 증폭기를 TSMC 0.18 ${\mu}m$ RF CMOS 공정을 이용하여 설계하였다. 높은 이득과 낮은 전력 소모를 만족하기 위해서 전류 재사용 기법을 사용하였으며, subthreshold 영역에서 문턱 전압보다 낮은 바어이스 전압을 인가함으로써 초 저전력 특성을 구현하였다. 설계된 저잡음 증폭기는 2.4 GHz에서 13.8 dB의 전압 이득과 3.4 dB의 잡음 지수 특성을 나타냈으며, 0.9 V의 공급 전압으로 0.7 mA의 전류를 소모하여 0.63 mW의 초 저전력을 소모하는 결과를 얻었다. 칩 면적은 $1.1\;mm{\times}0.8\;mm$이다.

In this paper, we proposed an ultra-low power low noise amplifier(LNA) using a TSMC 0.18 ${\mu}m$ RF CMOS process. To satisfy the low power consumption with high gain, a current-reused technique is utilized. In addition, a low bias voltage in the subthreshold region is utilized to achieve ultra low power characteristic. The designed LNA has the voltage gain of 13.8 dB and noise figure(NF) of 3.4 dB at 2.4 GHz. The total power consumption of the designed LNA is only 0.63 mW from 0.9 V supply voltage and chip occupies $1.1\;mm{\times}0.8\;mm$ area.

키워드

참고문헌

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피인용 문헌

  1. 0.11μm CMOS Low Power Broadband LNA design for 3G/4G LTE Environment vol.9, pp.9, 2014, https://doi.org/10.13067/JKIECS.2014.9.9.1027