전기학회논문지 (The Transactions of The Korean Institute of Electrical Engineers)

  • 제58권3호
  • /
  • Pages.627-631
  • /
  • 2009
  • /
  • 1975-8359(pISSN)
  • /
  • 2287-4364(eISSN)
대한전기학회 (The Korean Institute of Electrical Engineers)
권호 표지

디코더 면적을 줄이는 새로운 전류구동 셀 매트릭스 DAC 구조

A Novel Current Steering Cell Matrix DAC Architecture with Reduced Decoder Area

  • 정상훈 (전북대학교 공과대학 전자정보공학부) ;
  • 신홍규 (원광대학교 공과대학 전기전자및정보공학부) ;
  • 조성익 (전북대학교 공과대학 전자정보공학부)
  • 발행 : 2009.03.01
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초록

This paper presents a novel current steering cell matrix DAC(digital-to-analog converter) architecture to reduce decoder area. The current cell matrix of a existing architecture is selected by columns and lows thermometer code decoder of input bits. But The current cell matrix of a proposal architecture is divided 2n by the thermometer code decoder of upper input bits and are selected by the thermometer code decoder of middle and lower input bits. Because of this configuration, decoder numbers have increased. But the gate number that composed of decoder has decreased. In case of the designed 8 bit current steering cell matrix DAC, the gate number of decoder has decreased by about 55% in comparison with a existing architecture.

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참고문헌

  1. Gaurav Raja, Basabi Bhaumik, '16-bit segmented type current steering DAC for video application', IEEE VLSI Design vol. 19, pp. 6, Jan. 2006 https://doi.org/10.1109/VLSID.2006.1
  2. Zhikun Hao, Ling Yuan, Weining Ni, Yin Shi, Guofa Hao, 'A 10-bit CMOS 300 MHz Current-Steering D/A Converter', ICCSC 2008. pp. 303-306, 26-28 May 2008 https://doi.org/10.1109/ICCSC.2008.70
  3. 배우진 'A 14b 200MS/s 2.6 mm2 36mW 0.18um CMOS DAC Based on 2-D Current Matching Techniques', 서강대학교 석사학위논문[2004]
  4. Santanu Sarkar, Ravi sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee, 'An 8-bit 1.8V 500MS/s CMOS DAC with a Novel Four-Stage Current Steering Architecture', ISCAS 2008. pp 203-206, June 17 2008-April 17 2008
  5. Rudy van de Plassche, 'CMOS Integrated Analog-To-Digital And Digital-To-Analog Converters', Kluwer Academic Publishers. pp. 214-222
  6. Chun-Yueh Huang, Tsung-Tidu Hou, Hung-Yu Wang 'A 12-bit 250-MHz Current-Steering DAC', ASIC, 2005. ASICON 2005. 6th International Conference On Vol. 1, pp 411-414, oct. 2005 https://doi.org/10.1109/ICASIC.2005.1611348