Research on PAE of CMOS Class-E Power Amplifier For Multiple Antenna System

다중 안테나 시스템을 위한 CMOS Class-E 전력증폭기의 효율 개선에 관한 연구

  • Kim, Hyoung-Jun (Information and Telecommunication Engineering, Soongsil University) ;
  • Joo, Jin-Hee (Information and Telecommunication Engineering, Soongsil University) ;
  • Seo, Chul-Hun (Information and Telecommunication Engineering, Soongsil University)
  • 김형준 (숭실대학교 정보통신전자공학부) ;
  • 주진희 (숭실대학교 정보통신전자공학부) ;
  • 서철헌 (숭실대학교 정보통신전자공학부)
  • Published : 2008.12.25

Abstract

In this paper, bias control circuit structure have been employed to improve the power added efficiency of the CMOS class-E power amplifier on low input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal. The proposed CMOS class-E power amplifier using bias controlled circuit has been improved the PAE on low output power level. The operating frequency is 2.14GHz and the output power is 22dBm to 25dBm. In addition to, it has been evident that the designed the structure has showed more than a 80% increase in PAE for flatness over all input power level, respectively.

본 논문에서는 전력증폭기의 입력신호의 크기에 따라 CMOS class-E 전력증폭기의 게이트와 드레인의 바이어스 전압을 조절함으로써 낮은 출력전력에서도 80% 이상의 고효율 특성을 갖는 CMOS class-E 전력증폭기를 설계하였다. 입력신호의 포락선을 검파하여 전력증폭기의 바이어스 전압을 조절하는 방법을 이용하였고, 동작주파수는 2.14GHz, 출력전력은 22dBm에서 25dBm, 전력부가효율은 모든 입력전력레벨에서 80.15%에서 82.96%의 특성을 얻을 수 있었다.

Keywords

References

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