Journal of the Korea Academia-Industrial cooperation Society (한국산학기술학회논문지)

The Korea Academia-Industrial cooperation Society (한국산학기술학회)
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Design of the voltage tuning circuit for channel selecting filter

채널선택용 필터를 위한 전압 안정화 회로 설계

  • 유인호 (전북대학교 응용시스템공학부) ;
  • 이우춘 (전북대학교 응용시스템공학부) ;
  • 방준호 (전북대학교 응용시스템공학부) ;
  • 조현섭 (청운대학교 디지털방송공학과)
  • Published : 2008.10.31
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Abstract

To compensate voltage error of the channel selecting filter, a current comparison type voltage tuning circuit is designed. Because the proposed current comparison type voltage tuning circuit is not need to attach another subcircuit, the chip size can be reduced, therefore the proposed circuit is very useful in the low voltage and low power channel filter. We used three channels including bluetooth communication system as application circuits of the proposed tuning circuit. As the results of HSPICE simulation using $0.18{\mu}m$ CMOS technology verify that the proposed tuning circuit respectively can be operated in $12{\mu}s$, $13{\mu}s$ and $15{\mu}s$ in three channel.

채널 선택용 필터의 전압오차를 보정하기 위해 전류비교 방식의 전압안정화 회로를 설계하였다. 제안된 전류비교 방식의 전압안정화 회로는 부속회로를 첨가 할 필요가 없어 칩 면적을 최소화 할 수 있고 저전압 저전력용 채널 선택용 필터 설계에 매우 유용하다. 제안된 안정화 회로의 응용 회로로써 블루투스 통신 시스템 채널을 포함한 3개의 통신채널을 이용하였다. $0.18{\mu}m$ CMOS 공정파라메터를 사용하여 HSPICE 시뮬레이션 한 결과, 제안된 안정화 회로는 3개의 통신 채널에서 각각 $12{\mu}s$, $13{\mu}s$, $15{\mu}s$이내에서 동작할 수 있음을 확인하였다.

Keywords

References

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