IE interfaces (산업공학)

Korean Institute of Industrial Engineers (대한산업공학회)
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Advanced Planning and Scheduling (APS) System Implementation for Semiconductor Manufacturing : A Case at Korean Semiconductor Manufacturing Company

반도체 제조를 위한 고도화 계획 및 일정 관리 시스템 구축 : 국내 반도체 업체 사례

  • Lim, Seung-Kil (Division of e-business IT, Sungkyul University) ;
  • Shin, Yong-Ho (Northeast Asia Logistics Innovation Cluster, University of Incheon)
  • 임승길 (성결대학교 e-비즈니스 IT학부) ;
  • 신용호 (인천대학교 동북아물류혁신 클러스터)
  • Received : 20070700
  • Accepted : 20070800
  • Published : 2007.09.30
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Abstract

Semiconductor manufacturing is one of the most complex and capital-intensive processes composed of several hundreds of operations. In today’s competitive business environments, it is more important than ever before to manage manufacturing process effectively to achieve better performances in terms of customer satisfaction and productivity than those of competitors. So, many semiconductor manufacturing companies implement advanced planning and scheduling (APS) system as a management tool for the complex semiconductor manufacturing process. In this study, we explain roles of production planning and scheduling in semiconductor manufacturing and principal factors that make the production planning and scheduling more difficult. We describe the APS system implementation project at Korean semiconductor manufacturing company in terms of key issues with realistic samples.

Keywords

References

  1. Cunningham, S. P., Spanos, C. J., and Voros, K. (1995), Semiconductor yield improvement: Results, and best practices, IEEE Transactions on Semiconductor Manufacturing, 8, 103-109 https://doi.org/10.1109/66.382273
  2. Dabbas, R. M., Chen, H. N., Fowler, J. W., and Shunk D. (2001), A combined dispatching criteria approach to scheduling semiconductor manufacturing systems. Computers and Industrial Engineering, 39, 307-324 https://doi.org/10.1016/S0360-8352(01)00008-0
  3. Elif Akcah, K. N. and Uzsoy, R. (2001), Cycle-time improvements for photolithography process in semiconductor manufacturing, IEEE Transactions on Semiconductor Manufacturing, 14(1), 48-56 https://doi.org/10.1109/66.909654
  4. Ellis, K. P., Lu, Y., and Bish, E. K. (2004), Scheduling of wafer test processes in semiconductor manufacturing, International Journal of Production Research, 42(2), 215-242 https://doi.org/10.1080/0020754031000118116
  5. Freed, J. and Leachman, R. C. (1999), Scheduling semiconductor device test operations on multi head testers. IEEE Transactions on Semiconductor Manufacturing, 12(4), 523-530 https://doi.org/10.1109/66.806130
  6. Horiguchi, K., Raghavan, R., Uzsoy, R., and Venkateswaran, S. (2001), Finite-capacity production planning algorithms fora semiconductor wafer fabrication facility, International Journal of Production Research, 39(5), 825-842 https://doi.org/10.1080/00207540010010253
  7. Hsieh, B. W., Chen, C. H., and Chang, S. C. (2001), Scheduling semiconductor wafer fabrication by using ordinal optimization-based simulation, IEEE Transactions on Robotics and Automation, 17(5), 599-608 https://doi.org/10.1109/70.964661
  8. Hwang, T. K. and Chang S. H. (2003), Design of a Lagrangian relaxation-based hierarchical production scheduling environment for semiconductor wafer fabrication, IEEE Transactions on Robotics and Automation, 19(4), 566-578 https://doi.org/10.1109/TRA.2003.814512
  9. Kim, S., Yea, S. H., and Kim, B. K. (2002), Shift scheduling for steppers in the semiconductor wafer fabrication process, lIE Transactions, 34, 167-177
  10. Kim, Y. D., Kim, J. U., Lim, S. K., and Jun, H. B. (1998), Due-date based scheduling and control policies in a multi product semiconductor wafer fabrication facility, IEEE Transactions on Semiconductor Manufacturing, 11(1), 155-164 https://doi.org/10.1109/66.661295
  11. .Kim, Y. D., Kim, J. G., Choi, B., and Kim, H. U. (2001), Production scheduling in a semiconductor wafer fabrication facility producing multiple product types with distinct due dates, IEEE Transactions on Robotics and Automation, 17(5), 589-598 https://doi.org/10.1109/70.964660
  12. Kim, Y. D., Shim, S. O., Choi, B., and Hwang, H. (2003), Simplification methods for accelerating simulation-based real-time scheduling in a semiconductor wafer fabrication facility, IEEE Transactions on Semiconductor Manufacturing, 16(2), 290-298 https://doi.org/10.1109/TSM.2003.811890
  13. Lee, Y. H. and Lee, B. K., and Jeong, B. (2000), Multi-objective production scheduling of probe process in semiconductor manufacturing, Production Planning and Control, 11(7), 660-669 https://doi.org/10.1080/095372800432124
  14. Lee, Y. H. and Kim, J. (2002), Manufacturing cycle time reduction using balance control in the semiconductor fabrication line, Production Planning and Control, 13(6), 529-540 https://doi.org/10.1080/0953728021000014954
  15. Lee, Y. H., Park, J., and Kim, S. (2002), Experimental study on input and bottleneck scheduling for a semiconductor fabrication line, IIE Transactions, 34, 179-190
  16. Malmstrom, C. (1997), An integrated approach to planning and scheduling at Phillips Semiconductors, Proceedings of JEEE/SEMI Advanced Semiconductor Manufacturing Conference D27-D29
  17. Murty, S. and Bienvenu, J. W. (1995), Global Planning at Harris Semiconductor, Proceedings of International Symposium on Semiconductor Manufacturing 18-23
  18. Pickett, B. and Zuniga, M. (1997), Modeling, scheduling, and dispatching in the dynamic environment of semiconductor manufacturing at FASL, Japan, Proceedings of IEEE/SEMI Advanced Semiconductor -Manufacturing Conference, 448-450
  19. Potoradi, J., Boon, O. S., and Mason S. J. (2002), Using simulation-based scheduling to maximize demand fulfillment in a semiconductor assembly facility, Proceedings of the 2002 Winter Simul-ation Conference, 1857-1861
  20. Rupp, T. M. and Ristic, M. (2000), Fine planning for supply chains in semiconductor manufacture, Journal of Material Processing Technology, 107, 390-397 https://doi.org/10.1016/S0924-0136(00)00724-X
  21. Sivakuma, A. I. (1999), Optimization of cycle time and utilization in semiconductor test manufacturing using simulation based, on-line, near-real-time scheduling system, Proceedings of the 1999 Winter Simulation Conference, 727-735
  22. Vargas-Villamil, F. D. and Rivera D. E. (2000), Multilayer optimization and scheduling using model predictive control: application to reentrant semiconductor manufacturing lines, Computers and Chemical Engineering, 24, 2009-2021 https://doi.org/10.1016/S0098-1354(00)00598-6
  23. Vargas-Villamil, F. D., Rivera D. E., and Kempf, K. G. (2003), A hierarchical approach to production control of reentrant semiconductor manufacturing lines, IEEE Transactions on Control systems Technology, 11(4), 578-587 https://doi.org/10.1109/TCST.2003.813368