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Stress Dependence of Thermal Stability of Nickel Silicide for Nano MOSFETs

  • Zhang, Ying-Ying (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Won-Jae (Department of Electronics Engineering, Chungnam National University) ;
  • Zhong, Zhun (Department of Electronics Engineering, Chungnam National University) ;
  • Li, Shi-Guang (Department of Electronics Engineering, Chungnam National University) ;
  • Jung, Soon-Yen (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Ga-Won (Department of Electronics Engineering, Chungnam National University) ;
  • Wang, Jin-Suk (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Hi-Deok (Department of Electronics Engineering, Chungnam National University) ;
  • Lim, Sung-Kyu (Thin Film Team, National Nanofab Center)
  • 발행 : 2007.07.26

초록

Dependence of the thermal stability of nickel silicide on the film stress of inter layer dielectric (ILD) layer has been investigated in this study and silicon nitride $(Si_3N_4)$ layer is used as an ILD layer. Nickel silicide was formed with a one-step rapid thermal process at $500^{\circ}C$ for 30 sec. $2000{\AA}$ thick $Si_3N_4$ layer was deposited using plasma enhanced chemical vapor deposition after the formation of Ni silicide and its stress was split from compressive stress to tensile stress by controlling the power of power sources. Stress level of each stress type was also split for thorough analysis. It is found that the thermal stability of nickel silicide strongly depends on the stress type as well as the stress level induced by the $Si_3N_4$ layer. In the case of high compressive stress, silicide agglomeration and its phase transformation from the low-resistivity nickel mono-silicide to the high-resistivity nickel di-silicide are retarded, and hence the thermal stability is obviously improved a lot. However, in the case of high tensile stress, the thermal stability shows the worst case among the stressed cases.

키워드

참고문헌

  1. S. P. Murarka, 'Self-aligned silicides or metals for very large scale integrated circuit applications', J. Vac. Sci. Technol. B, Vol. 4, p. 1325, 1986
  2. H. Iwai, T. Ohguro, and S. I. Ohmi, 'NiSi salicide technology for scaled CMOS', Microelectron. Eng., Vol. 60, p. 157,2000
  3. F. Deng, R.A. Johnson, P. M. Asbeck, and S. S. Lay, 'Salicidation process using NiSi and its device application', J. Appl. Phys., Vol. 81, No. 12, p. 8047, 1997
  4. C. J. Choi, Y. W. Ok, S. S. Hullavarad, T. Y. Seong, K. M. Lee, J. H. Lee, and Y. J. Park, 'Effects of hydrogen implantation on the structural and electrical properties of nickel silicide', J. Electrochem. Soc., Vol. 149, p. G517,2002
  5. Y. J. Kim, S. Y. Oh, W. J. Lee, Y. Y. Zhang, Z. Zhong, S. Y. Jung, H. H. Ji, H. S. Cha, Y. C. Kim, J. S. Wang, and H. D. Lee, 'Thermal stability improvement of Nickel Germanosilicide utilizing Ni-Pd alloy nano-scale CMOS technology', IEEE Si Nanoelectronics Workshop, p. 51,2006
  6. L. J. Jin, K. L, Pey, W. K. Choi, D. A. Antoniadis, E. A. Fitzgerald, and D. Z. Chi, 'Electrical characterization of 'platinum and palladium effects in nickel monosilicide/n-Si Schottky contacts', Thin Solid Films, Vol. 504, p. 149,2006 https://doi.org/10.1016/j.tsf.2005.09.063
  7. K. L. Pey, P. S. Lee, and D. Mangelinck, 'Ni(Pt) alloy silicidation on (100) Si and poly-silicon lines', Thin Solid Films, Vol. 462-463, p. 137,2004
  8. P. S. Lee, K. L. Pey, D. Mangelinck, J. Ding, D. Z. Chi, and L. Chan, 'New salicidation technology with Ni(Pt) alloy for MOSFETs', IEEE Electron Device Lett., Vol. 22, No. 12, p. 568,2001
  9. S. Y. Oh, J. G. Yun, B. F. Huang, Y. J. Kim, H. H. Ji, U. S. Kim, H. S. Cha, S. B. Heo, J. G. Lee, J. s. Wang, and H. D. Lee, 'Novel nitrogen doped Ni self-alingned silicide process for nanoscale complementary metal oxide semiconductor technology', Jpn. J. Appl. Phys., Vol. 44, p. 2142, 2005 https://doi.org/10.1143/JJAP.44.2142
  10. M. C. Sun, M. J. Kim, J. H. Ku, K. J. Roh, C. S. Kim, S. P. Youn, W. Jung, S. Choi, N. I. Lee, H. K. Kang, and K. P. Suh, 'Thermally robust Ta-doped Ni SALICIDE process promising for sub-Sfl urn CMOSFETs', Symposium on VLSI Tech. Dig., p. 81,2003
  11. Y. J. Kim, C. J. Choi, R. J. Jung, S. Y. Oh, J. G. Yun, W. J. Lee, H. H. Ji, J. S. Wang, and H. D. Lee, 'The effect of triple capping layer (Ti/Ni/TiN) on the electrical and structural properties of nickel monosilicide', J. Electrochem. Soc., Vol. 153, p. G35,2006 https://doi.org/10.1149/1.2130695
  12. B. F. Huang, S. Y. Oh, J. G. Yun, Y. J. Kim, H. H. Ji, Y. G. Kim, J. S. Wang, and H. D. Lee, 'Study of Ni-germano silicide thermal stability for nano-scale CMOS technology', J. of KIEEME(in Korean), Vol. 17, No. 11, p. 1149,2004
  13. J. L. Hoyt, H. M. Nayfeh, S. Eguchi, I. Aberg, G. Xia, T. Drake, E. A. Fitzgerald, and D. A. Antoniadis, 'Strained silicon MOSFET technology', in IEDM Tech. Dig., p. 23, 2002
  14. S. L. Cheng, H. M. Lo, L. W. Cheng, S. M. Chang, and L. J. Chen, 'Effects of stress on the interfacial reactions of metal thin films on (001)Si', Thin Solid Films, Vol. 424, p. 33, 2003 https://doi.org/10.1016/S0040-6090(02)00902-1
  15. C. J. Tsai and K. H. Yu, 'Stress evolution during isochronal annealing of Ni/Si system', Thin Solid Films, Vol. 350, p. 91, 1999
  16. S. S. Guoa, Y. C. Chub, and C. J. Tsai, 'Stress evolution in Co/Ti/Si system', Mater. Chern. Phy., Vol. 88, p. 71,2004 https://doi.org/10.1016/j.matchemphys.2004.06.011
  17. C. J. Tsai, P. L. Chung, and K. H. Yu, 'Stress evolution of Ni/Pd/Si reaction system under isochronal annealing', Thin Solid Films, Vol. 365, p. 72, 2000
  18. G. G. Stoney, 'The tension of metallic films deposited by electrolysis', Proc. R. Soc. London, Ser. 4, Vol. 82, p. 172, 1909
  19. W. A. Brantley, 'Calculated elastic constants for stress problems associated with semiconductor devices', J. Appl. Phys., Vol. 44, p. 534, 1973