Journal of Information Display

The Korean Infomation Display Society (한국정보디스플레이학회)
권호 표지

The Characterization of Poly-Si Thin Film Transistor Crystallized by a New Alignment SLS Process

  • Published : 2007.12.31
Download PDF
⟨ Previous Next ⟩

Abstract

In this paper, we investigated the SLS process to control grain boundary(GB) location in TFT channel region, and it has been found to be applicable for locating the GB at the same location in the channel region of each TFT. We fabricated TFT by applying a new alignment SLS process and compared the TFT characteristics with a normal SLS method and the grain boundary location controlled SLS method. Also, we have analysed degradation phenomena under hot carrier stress conditions for n-type LDD MOSFETs.

Keywords

References

  1. P Mark A. Crowder, A. Tolis Voutsas, Steven R. Droes, Masao Moriguchi and Yasuhiro Mitani, IEEE Transactions on ELECTRON DEVICES, VOL. 51, NO. 4, APRIL 2004 https://doi.org/10.1109/TED.2004.839740
  2. Y. J. Kim, K. S. Hwang, Y. I. Park, S. W. Lee, H. C. Kang, K. M. Lim, C. D. Kim and I. J. Chung, AMLCD 05, 249 (2005)
  3. L. Mariucci, A. Pecora, R. Carluccio and G. Fortunato, Thin Solid Films 383, 39 (2001) https://doi.org/10.1016/S0040-6090(00)01625-4
  4. G. A. Armstrong, S. Uppal, S. D. Brotherton and J. R Ayres, Jpn. J. Appl. Phys. Vol. 37 1721 (1998) https://doi.org/10.1143/JJAP.37.1721
  5. A. Bonfiglietti, A. Valletta, P. Gaucci, L. Mariucci and G. Fortunato, S. D. Brotherton, JOURNAL OF APPLIED PHYSICS 98, 033702 (2005) https://doi.org/10.1063/1.1985974