반도체디스플레이기술학회지 (Journal of the Semiconductor & Display Technology)
- 제6권4호
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- Pages.49-52
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- 2007
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- 1738-2270(pISSN)
반도체 세정 공정 평가를 위한 나노입자 안착 시스템 개발
Development of Particle Deposition System for Cleaning Process Evaluation in Semiconductor Fabrication
- 남경탁 (성균관대학교 대학원) ;
- 김영길 (성균관대학교 대학원) ;
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김호중
(성균관대학교 기계공학부 & 성균나노과학기술원)
;
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김태성
(성균관대학교 기계공학부 & 성균나노과학기술원)
- Nam, Kyung-Tag (Graduate School of Sungkyunkwan University) ;
- Kim, Young-Gil (Graduate School of Sungkyunkwan University) ;
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Kim, Ho-Joong
(School of Mechanical Engineering & SKKU Advanced Institute of Nanotechnology(SAINT) in Sungkyunkwan University)
;
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Kim, Tae-Sung
(School of Mechanical Engineering & SKKU Advanced Institute of Nanotechnology(SAINT) in Sungkyunkwan University)
- 발행 : 2007.12.30
초록
As the minimum feature size decrease, control of contamination by nanoparticles is getting more attention in semiconductor process. Cleaning technology which removes nanoparticles is essential to increase yield. A reference wafer on which particles with known size and number are deposited is needed to evaluate the cleaning process. We simulated particle trajectories in the chamber by using FLUENT. Charged monodisperse particles are generated using SMPS (Scanning Mobility Particle Sizer) and deposited on the wafer by electrostatic force. The Experimental results agreed with the simulation results well. We calculate the particles loss in pipe flow theoretically and compare with the experimental results.