초록
For the sub-65 nm CMOS process, it is necessary to develop a new silicide material and an accompanying process that allows the silicide to maintain a low sheet resistance and to have an enhanced thermal stability, thus providing for a wider process window. In this study, we have evaluated the property and unit process compatibility of newly proposed composite silicides. We fabricated composite silicide layers on single crystal silicon from $10nm-Ni_{1-x}Co_x/single-crystalline-Si(100),\;10nm-Ni_{1-x}Co_x/poly-crystalline-\;Si(100)$ wafers (x=0.2, 0.5, and 0.8) with the purpose of mimicking the silicides on source and drain actives and gates. Both the film structures were prepared by thermal evaporation and silicidized by rapid thermal annealing (RTA) from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, surface composition, were investigated using a four-point probe, a field emission scanning probe microscope, a field ion beam, an X-ray diffractometer, and an Auger electron depth profi1ing spectroscopy, respectively. Finally, our newly proposed composite silicides had a stable resistance up to $1100^{\circ}C$ and maintained it below $20{\Omega}/Sg$., while the conventional NiSi was limited to $700^{\circ}C$. All our results imply that the composite silicide made from NiCo alloy films may be a possible candidate for 65 nm-CMOS devices.
