참고문헌
- Bibliography of material on Decimal Arithmetic, http://www2.hursley.ibm.com/decimal/decifaq1.html, Sept. 2002
- M. F. Cowlishaw, et al., 'A decimal floating-point specification,' Proc. 15th IEEE Symposium on Computer Arithmetic, pp. 147-154, June 2001 https://doi.org/10.1109/ARITH.2001.930114
- R. D. Kenney and M. J. Schulte, 'High-speed Multioperand decimal adders,' IEEE Transactions on Computers, vol. 54, no. 8, pp. 953-963, August 2005 https://doi.org/10.1109/TC.2005.129
- F. Busaba, C. Krygowski, E. Schwarz, W. Li and S. Carlough, 'IBM z900 Decimal Arithmetic Unit,' Proc. the 35th Asilomar Conf. on Signals, Systems, and Computers, pp. 1335-1339, Nov. 2001 https://doi.org/10.1109/ACSSC.2001.987708
- S. Hermann, Decimal Computation, Wiley-Inter Science Publication, 1974
- Ramchan Woo, Se-Joong Lee and Hoi-Jun Yoo, 'A 670 ps, Dynamic Low-Power Adder Design,' ISCAS 2000- IEEE International Symposium on Circuit and System, vol. 1, pp. 28-31, May 2000 https://doi.org/10.1109/ISCAS.2000.857017
- R. J. Baker, H. W. Li, and D. E. Boyce, CMOS Circuit Design, Layout, and Simulation, IEEE PRESS, 1998, ch. 14
- R. K. Richards, Arithmetic Operations in Digital Computers. D. Vanostrand Company, Inc., 1955
- M. S. Schmookler and A. Weinberger, 'High speed decimal addition,' IEEE Transactions on Computers, vol. C-20, no. 8, pp. 862-866, August 1971 https://doi.org/10.1109/T-C.1971.223362
- J. Choi and Y. You, 'An excess-3 code carry lookahead design for high-speed decimal addition,' IEEK J., vol. 40 CI, no. 5, pp 241-249, Sept. 2003
- Y. You, Y. Kim and J. Choi, 'Dynamic decimal adder circuit design by using the carry lookahead,' Proc. Design and Diagnostics of Electronic Circuit and Systems, pp.244-246, Apr. 2006