Fault Location Identification Using Software Fault Tolerance Technique

소프트웨어 Fault Tolerance를 이용한 고장점 표정

  • Published : 2005.02.01

Abstract

The management of technological systems will become increasingly complex. Safe and reliable software operation is a significant requirement for many types of system. So, with software fault tolerance, we want to prevent failures by tolerating faults whose occurrences are known when errors are detected. This paper presents a fault location algorithm for single-phase-to-ground faults on the teed circuit of a parallel transmission line using software fault tolerance technique. To find the fault location of transmission line, we have to solve the 3rd order transmission line equation. A significant improvement in the identification of the fault location was accomplished using the N-Version Programming (NVP) design paradigm. The delivered new algorithm has been tested with the simulation data obtained from the versatile EMTP simulator.

Keywords

References

  1. M, Abe, N. Otsuzuki, T, Emura, M. Takeuchi, 'Development of a New Fault Location System for Multi-Terminal Single Transmission Lines,' IEEE Trans. on PWRD, Vol. 10, No. 7, 1995, pp.159-168 https://doi.org/10.1109/61.368402
  2. M. S. Sachdev, R. Agarwal, 'A Technique for Estimating Transmission Line Fault Locations from Digital Impedance Relay Measurements', IEEE Trans. on PWRD, Vol. 3, No. 1, pp.121-129, 1988 https://doi.org/10.1109/61.4237
  3. A. Wiszniewski, 'Accurate Fault Impedance Locating Algorithm', IEE Proceedings, Vol. 130, pt. C, No. 6, pp.311-314, 1983
  4. R. K. Aggarwal, D. V. Coury, A. T. Johns, A. Kalam, 'A Practical Approach to Accurate Fault Location on Extra High Voltage Teed Feeders', IEEE Trans. on Power Delivery, Vol. 8, No. 3, pp. 874-883, 1993 https://doi.org/10.1109/61.252615
  5. 박홍규, 이명수, 이재규, 유석구, '송전선에서의 고저항 지락사고시 고장거리 추정에 관한 알고리즘', 대한전기학회 하계학술대회 논문집, pp.1363-1365, 1999
  6. Sang-Hee Kang, Seung-Jae Lee, Young-Jin Kwon, Yong-Cheol Kang, 'A Fault Location Algorithm for Parallel Transmission Line with a Teed Circuit,' Power Engineering Society Summer Meeting, 2001. IEEE , Volume: 2 , 15-19 July 2001 Pages:921 - 926 vol.2 https://doi.org/10.1109/PESS.2001.970178
  7. Randell, B., 'Software Structure for Software Fault Tolerance,' IEEE Transactions on Software Engineering, 1,2, June 1975, pp. 220-232
  8. Avizienis, A., and Chen, L., 'On the Implementation of N-Version Programming for Software Fault Tolerance During Execution,' Proceedings 1st IEEE International Computer Science Applications Conference, Chicago, Illinois, November 1977, pp. 149-155
  9. Melliar-Smith P.M., B.Randell, 'Software reliability: the role of programmed exception handling,' SIGPLAN Notices 12(3), 1977, pp. 95-100 https://doi.org/10.1145/390018.808315
  10. Kim K.H. 'Distributed execution of recovery blocks: an approach to uniform treatment of hardware and software faults, Proc. 4th International Conference on Distributed Computing Systems,' IEEE Computer Society Press, 1984, pp. 526-532
  11. Yau S.S., R.C.Cheung, 'Design of Self-Checking Software,' Proc. Int. Conf. on Reliable Software, 1975, pp. 450 - 457 https://doi.org/10.1145/800027.808468
  12. Laprie J.C., J.Arlat, C.Beounes, K.Kanoun, 'Definition and Analysis of Hardware and Software Fault Tolerant Architectures,' IEEE Computer, 23(7), 1990, pp. 39-51 https://doi.org/10.1109/2.56851
  13. Scott R.K., J.W.Gault, D.F. Mc Allister, 'Fault tolerant software reliability modeling,' IEEE Trans. on Software Engineering, 13(5), 1987, pp. 582-592 https://doi.org/10.1109/TSE.1987.233463
  14. Avizienis, A., 'The N-Version Approach to Fault-Tolerant Software,' IEEE Transactions on Software Engineering, Vol. SE-11, No. 12, 1985, pp. 1491-1501 https://doi.org/10.1109/TSE.1985.231893
  15. Lyu, M. R. (ed.), Handbook of Software Reliability Engineering, New York: McGraw-Hill, 1996