Journal of the Institute of Electronics Engineers of Korea TC (대한전자공학회논문지TC)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of Single Rate Three Color Marker using FPGA

EPGA를 이용한 Single Rate Three Color Marker 설계

  • Published : 2005.12.01
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Abstract

This paper addresses the design of srTCM (single rate Three Color Marker) described in RFC2697. It has proposed for srTCM to be used at the ingress of Differentiated Service network that provides AF PHB (Assured Forwarding Per Hop Behavior). srTCM is the marker with the metering function, and consists of the token updating function and the marking function. The token updating function uses the dual token bucket. The marking function compares the token values with the length of input packet, and then marks the result into IP QoS field (ToS field). This paper designs srTCM function and then implements it in one chip using VHDL and FPGA technology.

본 논문은 RFC2697에서 제안된 srTCM (single rate Three Color Marker)의 설계에 관한 것이다. srTCM은 AFPHB(Assured Forwarding Per Hop Behavior)를 제공하는 DS (Differentiated Service) 네트워크의 Ingress에서 사용되도록 제안되었다. srTCM은 metering 기능을 가진 marker이며, 토큰 갱신기능과 marking 기능으로 구성된다. 토큰 갱신 기능은 듀얼 토큰버킷을 사용하며, marking 기능은 토큰 값을 입력 패킷의 길이와 비교하여, 그 결과를 IP QoS 필드 (ToS 필드)에 마킹한다. 본 논문에서는 이와 같은 srTCM를 VHDL과 FPGA를 이용하여 설계하여 하나의 chip으로 구현하였다.

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References

  1. 'IP Quality of Service', Cisco Press. 2001
  2. Brian E. Carpenter and Kathleen Nichols, 'Differentiated Services in the Internet,' Proceeding of the IEEE, VOL.90, NO.9, September 2002
  3. Chuck Semeria, John W. Stewart III, 'Supporting Differentiated Service Classes in Large IP Networks,' White Paper, Juniper Network, Inc. 2001
  4. Heinanen J. and R. Guerin, 'A Single Rate Three Color Marker', RFC2697, September 1999
  5. K. nicholas, S. Blake, F. Barker and D. Black, 'Definition of the Differentiated Service Field (DS Field) in the IPv4 and IPv6 Headers', RFC2474, Dec. 1998
  6. S. D'Antonio et al., 'An Architecture for Differentiated Service', RFC2475, Dec. 1998
  7. J. Heinanen, F. Baker, W. Weiss, and J. Wroclawski, 'Assured Forwarding PHB Group',RFC2597, June 1999
  8. Douglas J. Smith 'HDL Chip Design A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs using VHDL or Verilog,' Doone Publications, 1996
  9. Charles H. Roth, Jr. 'Digital Systems Design Using VHDL', PWS Pbblishing Company, 1998