대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

5.8GHz/5.2GHz/2.4GHz 무선 랜 응용을 위한 선형 이득 CMOS LC VCO의 설계

Design of CMOS LC VCO with Linearized Gain for 5.8GHz/5.2GHz/2.4GHz WLAN Applications

  • 안태원 (동양공업전문대학 전기전자통신공학부) ;
  • 문용 (숭실대학교 정보통신전자공학부)
  • Ahn Tae-Won (Dept. of Electronics, Dongyang Technical College) ;
  • Moon Yong (School fo Electronics Engineering, Soongsil University)
  • 발행 : 2005.06.01
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초록

삼중 대역 무선 랜 응용을 위한 CMOS LC VCO를 1.8V 0.18$\mu$m CMOS 공정으로 설계하였다. 저잡음 특성을 얻기 위하여 VCO 코어는 PMOS 트랜지스터로 구성하였으며 인덕터와 캐패시터를 선택적으로 스위칭하는 기법을 적용하여 5.8GHz 대역 (5.725$\~$5.825GHz), 5.2GHz 대역 (5.150$\~$5.325GHz), 그리고 2.4GHz 대역 (2.412$\~$2.484GHz)에서 동작 가능한 것을 확인하였다. 또한 MOS 버랙터(varactor)에 다중 바이어스를 적용하고 최적화하여 캐패시턴스의 선형 특성을 개선함으로써 VCO의 이득을 선형화하고 PLL의 안정도를 크게 개선하였다. VCO 코어의 소모 전류는 2mA, 면적은 $570{\mu}m{\times}600{\mu}m$이며, 3가지 주파수 대역 모두 1MHz 옵셋에서 -110dBc/Hz 이하의 잡음 특성이 가능함을 확인하였다.

CMOS LC VCO for tri-bind wireless LAN applications was designed in 1.8V 0.18$\mu$m CMOS process. PMOS transistors were chosen for VCO core to reduce flicker noise. The possible operation was verified for 5.8GHz band (5.725$\~$5.825GHz), 5.2GHz band (5.150$\~$5.325GHz), and 2.4GHz band (2.412$\~$2.484GHz) using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing technique was used for capacitance linearization and PLL stability improvement. VCO core consumed 2mA current and $570{\mu}m{\times}600{\mu}m$ die area. The phase noise was lower than -110dBc/Hz at 1MHz offset for tri-band frequencies.

키워드

참고문헌

  1. IEEE Wireless LAN Standards
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